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Show patches with
: Submitter =
Lad, Prabhakar
| 48 patches
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Apply
Patch
Series
A/R/T
S/W/F
Date
Submitter
Delegate
State
[v2,2/2] clk: renesas: r9a09g057: Add support for PLLVDO, CRU clocks, and resets
clk: renesas: rzv2h-cpg: Add CRU and CSI clocks
- 1 -
-
-
-
2024-11-04
Lad, Prabhakar
Awaiting Upstream
[v2,1/2] clk: renesas: rzv2h-cpg: Add selective Runtime PM support for clocks
clk: renesas: rzv2h-cpg: Add CRU and CSI clocks
- - -
-
-
-
2024-11-04
Lad, Prabhakar
Awaiting Upstream
[2/2] clk: renesas: r9a09g057-cpg: Add support for PLLVDO, CRU clocks, and resets
clk: renesas: rzv2h-cpg: Add CRU and CSI clocks
- 1 -
-
-
-
2024-10-28
Lad, Prabhakar
Superseded
[1/2] clk: renesas: rzv2h-cpg: Add support for clocks without PM
clk: renesas: rzv2h-cpg: Add CRU and CSI clocks
- - -
-
-
-
2024-10-28
Lad, Prabhakar
Changes Requested
clk: renesas: r9a09g057: Add CA55 core clocks
clk: renesas: r9a09g057: Add CA55 core clocks
- 1 -
-
-
-
2024-09-18
Lad, Prabhakar
Awaiting Upstream
[v3,2/2] clk: renesas: r9a09g057-cpg: Add clock and reset entries for GTM/RIIC/SDHI/WDT
clk: renesas: rzv2h-cpg: Add divider clock support
- 1 -
-
-
-
2024-08-28
Lad, Prabhakar
Awaiting Upstream
[v3,1/2] clk: renesas: rzv2h-cpg: Add support for dynamic switching divider clocks
clk: renesas: rzv2h-cpg: Add divider clock support
- 1 -
-
-
-
2024-08-28
Lad, Prabhakar
Awaiting Upstream
[v2,2/2] clk: renesas: r9a09g057-cpg: Add clock and reset entries for GTM/RIIC/SDHI/WDT
clk: renesas: rzv2h-cpg: Add divider clock support
- - -
-
-
-
2024-08-22
Lad, Prabhakar
Changes Requested
[v2,1/2] clk: renesas: rzv2h-cpg: Add support for dynamic switching divider clocks
clk: renesas: rzv2h-cpg: Add divider clock support
- - -
-
-
-
2024-08-22
Lad, Prabhakar
Changes Requested
[2/2] clk: renesas: r9a09g057-cpg: Add clock and reset entries for GTM/RIIC/SDHI/WDT
clk: renesas: rzv2h-cpg: Add divider clock support
- - -
-
-
-
2024-08-05
Lad, Prabhakar
Awaiting Upstream
[1/2] clk: renesas: rzv2h-cpg: Add support for dynamic switching divider clocks
clk: renesas: rzv2h-cpg: Add divider clock support
- - -
-
-
-
2024-08-05
Lad, Prabhakar
Awaiting Upstream
clk: renesas: rzv2h-cpg: Fix undefined reference to r9a09g057_cpg_info
clk: renesas: rzv2h-cpg: Fix undefined reference to r9a09g057_cpg_info
- 1 -
-
-
-
2024-08-05
Lad, Prabhakar
Awaiting Upstream
[v5,3/3] clk: renesas: Add RZ/V2H(P) CPG driver
Add CPG support for RZ/V2H(P) SoC
- 1 -
-
-
-
2024-07-29
Lad, Prabhakar
Awaiting Upstream
[v5,2/3] clk: renesas: Add family-specific clock driver for RZ/V2H(P)
Add CPG support for RZ/V2H(P) SoC
- 1 -
-
-
-
2024-07-29
Lad, Prabhakar
Awaiting Upstream
[v5,1/3] dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
Add CPG support for RZ/V2H(P) SoC
- 2 -
-
-
-
2024-07-29
Lad, Prabhakar
Awaiting Upstream
[v4,3/3] clk: renesas: Add RZ/V2H(P) CPG driver
Add CPG support for RZ/V2H(P) SoC
- 1 -
-
-
-
2024-07-15
Lad, Prabhakar
Awaiting Upstream
[v4,2/3] clk: renesas: Add family-specific clock driver for RZ/V2H(P)
Add CPG support for RZ/V2H(P) SoC
- - -
-
-
-
2024-07-15
Lad, Prabhakar
Awaiting Upstream
[v4,1/3] dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
Add CPG support for RZ/V2H(P) SoC
- 2 -
-
-
-
2024-07-15
Lad, Prabhakar
Awaiting Upstream
[v2,2/2] clk: renesas: rzg2l-cpg: Refactor to use priv for clks and base in clock register functions
clk: renesas: rzg2l-cpg: Refactor and simplify clock registration
- 1 -
-
-
-
2024-07-15
Lad, Prabhakar
Awaiting Upstream
[v2,1/2] clk: renesas: rzg2l-cpg: Use devres API to register clocks
clk: renesas: rzg2l-cpg: Refactor and simplify clock registration
- 1 -
-
-
-
2024-07-15
Lad, Prabhakar
Awaiting Upstream
[4/4] clk: renesas: rzg2l-cpg: Refactor to use priv for clks and base in clock register functions
clk: renesas: rzg2l-cpg: Refactor and simplify clock registration
- 1 -
-
-
-
2024-06-28
Lad, Prabhakar
Superseded
[3/4] clk: renesas: rzg2l-cpg: Remove unused base pointer from rzg2l_cpg_sd_mux_clk_register
clk: renesas: rzg2l-cpg: Refactor and simplify clock registration
- 1 -
-
-
-
2024-06-28
Lad, Prabhakar
Superseded
[2/4] clk: renesas: rzg2l-cpg: Simplify rzg3s_cpg_div_clk_register function
clk: renesas: rzg2l-cpg: Refactor and simplify clock registration
- 1 -
-
-
-
2024-06-28
Lad, Prabhakar
Superseded
[1/4] clk: renesas: rzg2l-cpg: Use devres API to register clocks
clk: renesas: rzg2l-cpg: Refactor and simplify clock registration
- - -
-
-
-
2024-06-28
Lad, Prabhakar
Superseded
[v3,3/3] clk: renesas: Add RZ/V2H(P) CPG driver
Add CPG support for RZ/V2H(P) SoC
- - -
-
-
-
2024-06-27
Lad, Prabhakar
Superseded
[v3,2/3] clk: renesas: Add family-specific clock driver for RZ/V2H(P)
Add CPG support for RZ/V2H(P) SoC
- - -
-
-
-
2024-06-27
Lad, Prabhakar
Superseded
[v3,1/3] dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
Add CPG support for RZ/V2H(P) SoC
- 1 -
-
-
-
2024-06-27
Lad, Prabhakar
Superseded
[RFC,v2,4/4] clk: renesas: Add RZ/V2H(P) CPG driver
Add CPG support for RZ/V2H(P) SoC
- - -
-
-
-
2024-06-10
Lad, Prabhakar
Changes Requested
[RFC,v2,3/4] clk: renesas: Add family-specific clock driver for RZ/V2H(P)
Add CPG support for RZ/V2H(P) SoC
- - -
-
-
-
2024-06-10
Lad, Prabhakar
Changes Requested
[RFC,v2,2/4] dt-bindings: clock: Add R9A09G057 core clocks
Add CPG support for RZ/V2H(P) SoC
- 1 -
-
-
-
2024-06-10
Lad, Prabhakar
Changes Requested
[RFC,v2,1/4] dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
Add CPG support for RZ/V2H(P) SoC
- - -
-
-
-
2024-06-10
Lad, Prabhakar
Changes Requested
dt-bindings: clock: renesas,rzg2l-cpg: Update description for #reset-cells
dt-bindings: clock: renesas,rzg2l-cpg: Update description for #reset-cells
1 1 -
-
-
-
2024-06-06
Lad, Prabhakar
Awaiting Upstream
[4/4] clk: renesas: Add RZ/V2H(P) CPG helper driver
Add CPG support for RZ/V2H(P) SoC
- - -
-
-
-
2024-05-24
Lad, Prabhakar
Superseded
[3/4] clk: renesas: Add RZ/V2H CPG core wrapper driver
Add CPG support for RZ/V2H(P) SoC
- - -
-
-
-
2024-05-24
Lad, Prabhakar
Under Review
[2/4] dt-bindings: clock: Add R9A09G057 CPG Clock and Reset Definitions
Add CPG support for RZ/V2H(P) SoC
1 - -
-
-
-
2024-05-24
Lad, Prabhakar
Changes Requested
[1/4] dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG driver
Add CPG support for RZ/V2H(P) SoC
- - -
-
-
-
2024-05-24
Lad, Prabhakar
Changes Requested
clk: renesas: r9a07g043: Add clock and reset entry for PLIC
clk: renesas: r9a07g043: Add clock and reset entry for PLIC
- 1 -
-
-
-
2024-04-03
Lad, Prabhakar
Awaiting Upstream
clk: renesas: r9a07g044: Add clock and reset entries for CRU
clk: renesas: r9a07g044: Add clock and reset entries for CRU
- 1 -
-
-
-
2022-12-21
Lad, Prabhakar
Awaiting Upstream
[v2,2/2] clk: renesas: r9a07g044: Add CRU_SYSCLK and CRU_VCLK to no PM list
clk: renesas: RZ/G2L: Add support for no PM clocks
- - -
-
-
-
2022-10-26
Lad, Prabhakar
Changes Requested
[v2,1/2] clk: renesas: rzg2l: Don't assume all CPG_MOD clocks support PM
clk: renesas: RZ/G2L: Add support for no PM clocks
- 1 -
-
-
-
2022-10-26
Lad, Prabhakar
Awaiting Upstream
clk: renesas: rzg2l: Fix typo
clk: renesas: rzg2l: Fix typo
- 1 -
-
-
-
2022-10-26
Lad, Prabhakar
Awaiting Upstream
clk: renesas: r9a07g043: Drop WDT2 clock and reset entry
clk: renesas: r9a07g043: Drop WDT2 clock and reset entry
- 2 -
-
-
-
2022-10-09
Lad, Prabhakar
Awaiting Upstream
clk: renesas: r9a07g044: Drop WDT2 clock and reset entry
clk: renesas: r9a07g044: Drop WDT2 clock and reset entry
- 2 -
-
-
-
2022-10-09
Lad, Prabhakar
Awaiting Upstream
[2/2] clk: renesas: r9a07g044: Mark CRU_SYSCLK and CRU_VCLK as no PM
clk: renesas: RZ/G2L: Add support for no PM clocks
- - -
-
-
-
2022-09-29
Lad, Prabhakar
Superseded
[1/2] clk: renesas: rzg2l: Don't assume all CPG_MOD clocks support PM
clk: renesas: RZ/G2L: Add support for no PM clocks
- - -
-
-
-
2022-09-29
Lad, Prabhakar
Changes Requested
[RFC,2/2] clk: renesas: r9a07g044: Mark CRU_SYSCLK and CRU_VCLK as no PM
clk: renesas: RZ/G2L: Add support for no PM clocks
- - -
-
-
-
2022-09-27
Lad, Prabhakar
Superseded
[RFC,1/2] clk: renesas: rzg2l: Don't assume all CPG_MOD clocks support PM
clk: renesas: RZ/G2L: Add support for no PM clocks
- - -
-
-
-
2022-09-27
Lad, Prabhakar
Changes Requested
clk: renesas: rzg2l: Fix typo in function name
clk: renesas: rzg2l: Fix typo in function name
- 1 -
-
-
-
2022-09-21
Lad, Prabhakar
Awaiting Upstream