Show patches with: State = Action Required       |    Archived = No       |   207 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
clk: sunxi-ng: Constify struct ccu_reset_map clk: sunxi-ng: Constify struct ccu_reset_map - - - --- 2024-09-20 Christophe JAILLET New
[5/5] arm64: dts: mediatek: mt8390-genio-700-evk: Enable Mali GPU Enable Mali GPU on MediaTek Genio 700 EVK - - - --- 2024-09-20 Pablo Sun New
[4/5] arm64: dts: mediatek: mt8188: Add efuse for GPU speed binning Enable Mali GPU on MediaTek Genio 700 EVK - - - --- 2024-09-20 Pablo Sun New
[3/5] nvmem: mtk-efuse: Enable postprocess for mt8188 GPU speed binning Enable Mali GPU on MediaTek Genio 700 EVK - - - --- 2024-09-20 Pablo Sun New
[2/5] clk: mediatek: clk-mt8188-topckgen: Remove univpll from parents of mfg_core_tmp Enable Mali GPU on MediaTek Genio 700 EVK - - - --- 2024-09-20 Pablo Sun New
[1/5] arm64: dts: mediatek: mt8188: Fix wrong clock provider in MFG1 power domain Enable Mali GPU on MediaTek Genio 700 EVK - - - --- 2024-09-20 Pablo Sun New
[v2,4/4] clk: qcom: gcc: Add support for QCS615 GCC clocks Add GCC and RPMH clock controller for QCS615 SoC - - - --- 2024-09-20 Taniya Das New
[v2,3/4] dt-bindings: clock: qcom: Add QCS615 GCC clocks Add GCC and RPMH clock controller for QCS615 SoC - 1 - --- 2024-09-20 Taniya Das New
[v2,2/4] clk: qcom: rpmhcc: Add support for QCS615 Clocks Add GCC and RPMH clock controller for QCS615 SoC - 1 - --- 2024-09-20 Taniya Das New
[v2,1/4] dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for QCS615 Add GCC and RPMH clock controller for QCS615 SoC 1 - - --- 2024-09-20 Taniya Das New
[6/6] clk: meson: s4: Delete the spinlock from the MPLL clk: meson: Delete a meaningless spinlock from the MPLL - - - --- 2024-09-20 Chuan Liu via B4 Relay New
[5/6] clk: meson: g12a: Delete the spinlock from the MPLL clk: meson: Delete a meaningless spinlock from the MPLL - - - --- 2024-09-20 Chuan Liu via B4 Relay New
[4/6] clk: meson: gxbb: Delete the spinlock from the MPLL clk: meson: Delete a meaningless spinlock from the MPLL - - - --- 2024-09-20 Chuan Liu via B4 Relay New
[3/6] clk: meson: meson8b: Delete the spinlock from the MPLL clk: meson: Delete a meaningless spinlock from the MPLL - - - --- 2024-09-20 Chuan Liu via B4 Relay New
[2/6] clk: meson: axg: Delete the spinlock from the MPLL clk: meson: Delete a meaningless spinlock from the MPLL - - - --- 2024-09-20 Chuan Liu via B4 Relay New
[1/6] clk: meson: mpll: Delete a meaningless spinlock from the MPLL clk: meson: Delete a meaningless spinlock from the MPLL - - - --- 2024-09-20 Chuan Liu via B4 Relay New
clk: meson: pll: Update the meson_clk_pll_init execution judgment logic clk: meson: pll: Update the meson_clk_pll_init execution judgment logic - - - --- 2024-09-20 Chuan Liu via B4 Relay New
[v2] clk: samsung: fsd: Mark PLL_CAM_CSI as critical [v2] clk: samsung: fsd: Mark PLL_CAM_CSI as critical - - - --- 2024-09-19 Inbaraj E New
[v28,2/3] reset: npcm: register npcm8xx clock auxiliary bus device Introduce Nuvoton Arbel NPCM8XX BMC SoC - 1 1 --- 2024-09-12 Tomer Maimon New
[3/3] clk: test: Add KUnit tests for clock-assigned-rates{-u64} DT properties clk: test: Test clock-assigned-rates{-u64} - - - --- 2024-08-22 Stephen Boyd New
[2/3] of: kunit: Extract some overlay boiler plate into macros clk: test: Test clock-assigned-rates{-u64} - - - --- 2024-08-22 Stephen Boyd New
[1/3] clk: test: Add test managed of_clk_add_hw_provider() clk: test: Test clock-assigned-rates{-u64} - - - --- 2024-08-22 Stephen Boyd New
[12/12] WIP: clk: Test behavior of children clks after a parent is unregistered clk: Unit test clk unregistration paths - - - --- 2024-08-15 Stephen Boyd New
[11/12] clk: Test parent/clk flags combos while unregistering a clk_hw clk: Unit test clk unregistration paths - - - --- 2024-08-15 Stephen Boyd New
[10/12] clk: Test clk_set_parent() behavior after clk_hw is unregistered clk: Unit test clk unregistration paths - - - --- 2024-08-15 Stephen Boyd New
[09/12] clk: Prevent unregistered clk_hw from being reinserted into clk tree clk: Unit test clk unregistration paths - - - --- 2024-08-15 Stephen Boyd New
[08/12] clk: Test clk_set_duty_cycle() behavior after clk_hw is unregistered clk: Unit test clk unregistration paths - - - --- 2024-08-15 Stephen Boyd New
[07/12] clk: Fail duty cycle APIs after clk_hw is unregistered clk: Unit test clk unregistration paths - - - --- 2024-08-15 Stephen Boyd New
[06/12] clk: Test clk_get_phase() behavior after clk_hw is unregistered clk: Unit test clk unregistration paths - - - --- 2024-08-15 Stephen Boyd New
[05/12] clk: Fail phase APIs after clk_hw is unregistered clk: Unit test clk unregistration paths - - - --- 2024-08-15 Stephen Boyd New
[04/12] clk: Add tests for unregistering clk_hw and using consumer APIs clk: Unit test clk unregistration paths - - - --- 2024-08-15 Stephen Boyd New
[03/12] clk: test: Introduce clk_put_kunit() clk: Unit test clk unregistration paths - - - --- 2024-08-15 Stephen Boyd New
[02/12] clk: test: Introduce clk_hw_unregister_kunit() clk: Unit test clk unregistration paths - - - --- 2024-08-15 Stephen Boyd New
[01/12] clk: Fix clk not being unlinked from consumers list clk: Unit test clk unregistration paths - - - --- 2024-08-15 Stephen Boyd New
[RESEND,v12,4/6] clk: wpcm450: Add Nuvoton WPCM450 clock/reset controller driver Nuvoton WPCM450 clock and reset driver - 1 - --- 2024-07-07 J. Neuschäfer New
[RESEND,v12,3/6] clk: provider: Address documentation pitfall in struct clk_parent_data Nuvoton WPCM450 clock and reset driver - - - --- 2024-07-07 J. Neuschäfer New
[2/3] dt-bindings: clock: mediatek: Document reset cells for MT8188 sys [1/3] arm64: dts: mediatek: mt8188: Fix VPPSYS0/1 node name/compatibles 1 - - --- 2024-06-19 AngeloGioacchino Del Regno New
[v4,1/2] clk: starfive: jh7110-sys: Add notifier for PLL clock Add notifier for PLL0 clock and set it 1.5GHz on - - - --- 2024-04-10 Xingyu Wu New
[v2] clk: si5341: Adjust rate rounding in si5341_output_clk_determine_rate() [v2] clk: si5341: Adjust rate rounding in si5341_output_clk_determine_rate() - - - --- 2024-09-19 Aleksandr Mishin Under Review
[v11,5/5] clk: rockchip: rk3588: drop RK3588_LINKED_CLK rockchip: clk: add GATE_LINK support - - - --- 2024-09-19 Sebastian Reichel Under Review
[v11,4/5] clk: rockchip: implement linked gate clock support rockchip: clk: add GATE_LINK support - - - --- 2024-09-19 Sebastian Reichel Under Review
[v11,3/5] clk: rockchip: expose rockchip_clk_set_lookup rockchip: clk: add GATE_LINK support - - - --- 2024-09-19 Sebastian Reichel Under Review
[v11,2/5] clk: rockchip: rk3588: register GATE_LINK later rockchip: clk: add GATE_LINK support - - - --- 2024-09-19 Sebastian Reichel Under Review
[v11,1/5] clk: rockchip: support clocks registered late rockchip: clk: add GATE_LINK support - - - --- 2024-09-19 Sebastian Reichel Under Review
[4/4] clk: qcom: gcc: Add support for QCS615 GCC clocks Add GCC and RPMH clock controller for QCS615 SoC - - - --- 2024-09-19 Taniya Das Under Review
[3/4] dt-bindings: clock: qcom: Add QCS615 GCC clocks Add GCC and RPMH clock controller for QCS615 SoC - 1 - --- 2024-09-19 Taniya Das Under Review
[2/4] clk: qcom: rpmhcc: Add support for QCS615 Clocks Add GCC and RPMH clock controller for QCS615 SoC - - - --- 2024-09-19 Taniya Das Under Review
[1/4] dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for QCS615 Add GCC and RPMH clock controller for QCS615 SoC - - - --- 2024-09-19 Taniya Das Under Review
[v3,1/1] clk: clk-qoriq: Replace of_node_put() with __free() [v3,1/1] clk: clk-qoriq: Replace of_node_put() with __free() - - - --- 2024-09-18 David Hunter Under Review
clk: Drop explicit initialization of struct i2c_device_id::driver_data to 0 clk: Drop explicit initialization of struct i2c_device_id::driver_data to 0 - - - --- 2024-09-18 Uwe Kleine-König Under Review
[4/6] clk: renesas: r9a09g057: Add clock and reset entries for ICU Add support for the RZ/V2H Interrupt Control Unit - - - --- 2024-09-17 Fabrizio Castro Under Review
clk: davinci: Use common error handling code in of_davinci_pll_init() clk: davinci: Use common error handling code in of_davinci_pll_init() - - - --- 2024-09-17 Markus Elfring Under Review
[2/2] dt-bindings: clock: samsung: remove define with number of clocks for FSD clk: samsung: remove number of clocks from bindings 1 - - --- 2024-09-17 Inbaraj E Under Review
[1/2] clk: samsung: fsd: do not define number of clocks in bindings clk: samsung: remove number of clocks from bindings - - - --- 2024-09-17 Inbaraj E Under Review
[4/4] clk: lan966x: add support for lan969x SoC clock driver clk: lan966x: add support for lan969x SoC clock driver - - - --- 2024-09-16 Daniel Machon Under Review
[3/4] clk: lan966x: prepare driver for lan969x support clk: lan966x: add support for lan969x SoC clock driver - - - --- 2024-09-16 Daniel Machon Under Review
[2/4] clk: lan966x: make clk_names const char * const clk: lan966x: add support for lan969x SoC clock driver - - - --- 2024-09-16 Daniel Machon Under Review
[1/4] dt-bindings: clock: add support for lan969x clk: lan966x: add support for lan969x SoC clock driver 1 - - --- 2024-09-16 Daniel Machon Under Review
[v3,4/4] clk: aspeed: add AST2700 clock driver. Add support for AST2700 clk driver - - - --- 2024-09-16 Ryan Chen Under Review
[v3,3/4] reset: aspeed: register AST2700 reset auxiliary bus device Add support for AST2700 clk driver - - - --- 2024-09-16 Ryan Chen Under Review
[v3,2/4] dt-bindings: Add AST2700 bindings Add support for AST2700 clk driver - - - --- 2024-09-16 Ryan Chen Under Review
[v3,1/4] dt-bindings: mfd: aspeed: support for AST2700 Add support for AST2700 clk driver - - - --- 2024-09-16 Ryan Chen Under Review
[4/4] clk: Drop obsolete devm_clk_bulk_get_all_enable() helper Provide devm_clk_bulk_get_all_enabled() helper - 1 - --- 2024-09-14 Cristian Ciocaltea Under Review
[3/4] PCI: exynos: Switch to devm_clk_bulk_get_all_enabled() Provide devm_clk_bulk_get_all_enabled() helper - - - --- 2024-09-14 Cristian Ciocaltea Under Review
[2/4] soc: mediatek: pwrap: Switch to devm_clk_bulk_get_all_enabled() Provide devm_clk_bulk_get_all_enabled() helper - 1 - --- 2024-09-14 Cristian Ciocaltea Under Review
[1/4] clk: Provide devm_clk_bulk_get_all_enabled() helper Provide devm_clk_bulk_get_all_enabled() helper - 1 - --- 2024-09-14 Cristian Ciocaltea Under Review
[5/5] clk: meson: add A5 clock peripherals controller driver Add A5 SoC PLLs and Peripheral clock - - - --- 2024-09-14 Xianwei Zhao via B4 Relay Under Review
[4/5] clk: meson: add support for the A5 SoC PLL clock Add A5 SoC PLLs and Peripheral clock - - - --- 2024-09-14 Xianwei Zhao via B4 Relay Under Review
[v2,6/6] clk: clocking-wizard: move dynamic reconfig setup behind flag clk: clocking-wizard: modernize probe - - - --- 2024-09-13 Harry Austen Under Review
[v2,5/6] dt-bindings: clock: xilinx: describe whether dynamic reconfig is enabled clk: clocking-wizard: modernize probe 1 - - --- 2024-09-13 Harry Austen Under Review
[v2,4/6] clk: clocking-wizard: move clock registration to separate function clk: clocking-wizard: modernize probe - - - --- 2024-09-13 Harry Austen Under Review
[v2,3/6] clk: clocking-wizard: use devres versions of clk_hw API clk: clocking-wizard: modernize probe - - - --- 2024-09-13 Harry Austen Under Review
[v2,2/6] clk: clocking-wizard: use newer clk_hw API clk: clocking-wizard: modernize probe - - - --- 2024-09-13 Harry Austen Under Review
[v2,1/6] clk: clocking-wizard: simplify probe/remove with devres helpers clk: clocking-wizard: modernize probe - 1 - --- 2024-09-13 Harry Austen Under Review
[v10,5/5] clk: rockchip: rk3588: drop RK3588_LINKED_CLK rockchip: clk: add GATE_LINK support - - - --- 2024-09-13 Sebastian Reichel Under Review
[v10,4/5] clk: rockchip: implement linked gate clock support rockchip: clk: add GATE_LINK support - - - --- 2024-09-13 Sebastian Reichel Under Review
[v10,3/5] clk: rockchip: expose rockchip_clk_set_lookup rockchip: clk: add GATE_LINK support - - - --- 2024-09-13 Sebastian Reichel Under Review
[v10,2/5] clk: rockchip: rk3588: register GATE_LINK later rockchip: clk: add GATE_LINK support - - - --- 2024-09-13 Sebastian Reichel Under Review
[v10,1/5] clk: rockchip: support clocks registered late rockchip: clk: add GATE_LINK support - - - --- 2024-09-13 Sebastian Reichel Under Review
[v2,5/5] arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100 Add support for PCIe3 on x1e80100 - 1 - --- 2024-09-13 Qiang Yu Under Review
[v2,4/5] clk: qcom: gcc-x1e80100: Fix halt_check for pipediv2 clocks Add support for PCIe3 on x1e80100 - 1 - --- 2024-09-13 Qiang Yu Under Review
[v2,3/5] phy: qcom: qmp: Add phy register and clk setting for x1e80100 PCIe3 Add support for PCIe3 on x1e80100 - 2 - --- 2024-09-13 Qiang Yu Under Review
[v2,2/5] dt-bindings: PCI: qcom: Add OPP table for X1E80100 Add support for PCIe3 on x1e80100 - 1 - --- 2024-09-13 Qiang Yu Under Review
[v2,1/5] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHY Gen4 x8 Add support for PCIe3 on x1e80100 - - - --- 2024-09-13 Qiang Yu Under Review
[v28,3/3] clk: npcm8xx: add clock controller Introduce Nuvoton Arbel NPCM8XX BMC SoC - 1 1 --- 2024-09-12 Tomer Maimon Under Review
[v28,1/3] dt-bindings: reset: npcm: add clock properties Introduce Nuvoton Arbel NPCM8XX BMC SoC - 1 - --- 2024-09-12 Tomer Maimon Under Review
[21/21] MAINTAINERS: add adi sc5xx maintainers Adding support of ADI ARMv8 ADSP-SC598 SoC. - - - --- 2024-09-12 Arturs Artamonovs via B4 Relay Under Review
[20/21] arm64: defconfig: sc598 add minimal changes Adding support of ADI ARMv8 ADSP-SC598 SoC. - - - --- 2024-09-12 Arturs Artamonovs via B4 Relay Under Review
[19/21] arm64: dts: adi: sc598: add device tree Adding support of ADI ARMv8 ADSP-SC598 SoC. - - - --- 2024-09-12 Arturs Artamonovs via B4 Relay Under Review
[18/21] dt-bindings: serial: adi,uart4: add adi,uart4 driver documentation Adding support of ADI ARMv8 ADSP-SC598 SoC. - - - --- 2024-09-12 Arturs Artamonovs via B4 Relay Under Review
[17/21] serial: adi,uart: Add driver for ADI ADSP-SC5xx Adding support of ADI ARMv8 ADSP-SC598 SoC. - - - --- 2024-09-12 Arturs Artamonovs via B4 Relay Under Review
[16/21] dt-bindings: i2c: add i2c/twi driver documentation Adding support of ADI ARMv8 ADSP-SC598 SoC. - - - --- 2024-09-12 Arturs Artamonovs via B4 Relay Under Review
[15/21] i2c: Add driver for ADI ADSP-SC5xx platforms Adding support of ADI ARMv8 ADSP-SC598 SoC. - - - --- 2024-09-12 Arturs Artamonovs via B4 Relay Under Review
[14/21] dt-bindings: pinctrl: adi,adsp-pinctrl: add bindings Adding support of ADI ARMv8 ADSP-SC598 SoC. - - - --- 2024-09-12 Arturs Artamonovs via B4 Relay Under Review
[13/21] pinctrl: Add drivers for ADI ADSP-SC5xx platform Adding support of ADI ARMv8 ADSP-SC598 SoC. - - - --- 2024-09-12 Arturs Artamonovs via B4 Relay Under Review
[12/21] dt-bindings: irqchip: adi,adsp-pint: add binding Adding support of ADI ARMv8 ADSP-SC598 SoC. - - - --- 2024-09-12 Arturs Artamonovs via B4 Relay Under Review
[11/21] irqchip: Add irqchip for ADI ADSP-SC5xx platform Adding support of ADI ARMv8 ADSP-SC598 SoC. - - - --- 2024-09-12 Arturs Artamonovs via B4 Relay Under Review
[10/21] dt-bindings: gpio: adi,adsp-port-gpio: add bindings Adding support of ADI ARMv8 ADSP-SC598 SoC. - - - --- 2024-09-12 Arturs Artamonovs via B4 Relay Under Review
[09/21] gpio: add driver for ADI ADSP-SC5xx platform Adding support of ADI ARMv8 ADSP-SC598 SoC. - - - --- 2024-09-12 Arturs Artamonovs via B4 Relay Under Review
[08/21] dt-bindings: clock: adi,sc5xx-clocks: add bindings Adding support of ADI ARMv8 ADSP-SC598 SoC. - - - --- 2024-09-12 Arturs Artamonovs via B4 Relay Under Review
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