From patchwork Thu Apr 28 06:08:37 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dirk Behme X-Patchwork-Id: 8965491 Return-Path: X-Original-To: patchwork-linux-clk@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 174049F1C1 for ; Thu, 28 Apr 2016 06:10:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 191D520221 for ; Thu, 28 Apr 2016 06:10:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 625872025A for ; Thu, 28 Apr 2016 06:10:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751257AbcD1GJ7 (ORCPT ); Thu, 28 Apr 2016 02:09:59 -0400 Received: from smtp6-v.fe.bosch.de ([139.15.237.11]:21644 "EHLO smtp6-v.fe.bosch.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751122AbcD1GJ5 (ORCPT ); Thu, 28 Apr 2016 02:09:57 -0400 Received: from vsmta11.fe.internet.bosch.com (unknown [10.4.98.51]) by imta24.fe.bosch.de (Postfix) with ESMTP id 77CD6D801D7; Thu, 28 Apr 2016 08:09:55 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=de.bosch.com; s=2015-01-21; t=1461823795; bh=k4zy/emm2f7S3+9DfeQqfI5zbI9O08zzWPf5soRgPPs=; l=10; h=From:From:Reply-To:Sender; b=yQGA4AgEA6Why18QRfJHyWAV68l6144L5zWJha7yxrrk9eaE9XEI1xk4l/2/FuWU5 bUHkkEyaj4q2j+esREqNWJk1DVWAp3EgHpEPAcp7ywOm5JLSeC/8mwV1MwGF8CmNhs m5hlQukoLFdB9/9g2C6IVwRg4wfrx6yPuynT2NsE= Received: from FE-HUB1001.de.bosch.com (vsgw22.fe.internet.bosch.com [10.4.98.11]) by vsmta11.fe.internet.bosch.com (Postfix) with ESMTP id 331DD2380362; Thu, 28 Apr 2016 08:09:55 +0200 (CEST) Received: from hi-z08if.hi.de.bosch.com (10.34.209.31) by FE-HUB1001.de.bosch.com (10.4.103.109) with Microsoft SMTP Server id 14.3.195.1; Thu, 28 Apr 2016 08:09:54 +0200 Received: from hi-z08if.hi.de.bosch.com (localhost [127.0.0.1]) by hi-z08if.hi.de.bosch.com (Postfix) with ESMTP id 24A41625E72; Thu, 28 Apr 2016 08:08:40 +0200 (CEST) From: Dirk Behme To: Geert Uytterhoeven , Simon Horman , CC: , , Oleksij Rempel , Pooya Keshavarzi , Oleksij Rempel , Dirk Behme Subject: [PATCH] clk: renesas: r8a7795: Move MODEMR to DT Date: Thu, 28 Apr 2016 08:08:37 +0200 Message-ID: <1461823717-22517-1-git-send-email-dirk.behme@de.bosch.com> X-Mailer: git-send-email 2.8.0 MIME-Version: 1.0 X-TM-AS-MML: disable X-TM-AS-Product-Ver: IMSS-7.1.0.1679-8.0.0.1202-22286.006 X-TMASE-MatchedRID: /6tHgHEL3iG1GtmZj6FUre7KTDtx8Cgg+eBf9ovw8I1+YesuCgkiXO+L 7OvOiZwZs0hQNdjjnspKhBUJyxjhBkEXheUXJvLHFxqdoICq+IYW40XiUkbrGx9SRCBQ0G7SyG0 SJ3kU3e4abhABqszoPfy7HXuKTKms6Ucyqoets+zil2r2x2Pwtfi4nVERfgwdEvoxTu3fj1sJ64 /kWP1C5ngHfz06cmB/e/6aYxCz7bIfE8yM4pjsDwtuKBGekqUpI/NGWt0UYPCLPxfcq0IYAd6tP nlvLDYbJu8toqJoCUWOBH0ba39xYB/X/dr37Slk Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Oleksij Rempel Map the Mode Monitor Register via the device tree instead of hard coding it in the code. This makes the mapping known to the device tree. Signed-off-by: Pooya Keshavarzi Signed-off-by: Oleksij Rempel Signed-off-by: Oleksij Rempel Signed-off-by: Dirk Behme --- .../devicetree/bindings/clock/renesas,cpg-mssr.txt | 9 ++++++--- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 4 +++- drivers/clk/renesas/r8a7795-cpg-mssr.c | 22 +++------------------- drivers/clk/renesas/renesas-cpg-mssr.c | 19 ++++++++++++++----- drivers/clk/renesas/renesas-cpg-mssr.h | 2 +- 5 files changed, 27 insertions(+), 29 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt index fefb802..7984485 100644 --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt @@ -15,8 +15,10 @@ Required Properties: - compatible: Must be one of: - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC - - reg: Base address and length of the memory resource used by the CPG/MSSR - block + - reg: + - 0: Base address and length of the memory resource used by the CPG/MSSR + block. + - 1: Mode Monitor Register. - clocks: References to external parent clocks, one entry for each entry in clock-names @@ -46,7 +48,8 @@ Examples cpg: clock-controller@e6150000 { compatible = "renesas,r8a7795-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; + reg = <0 0xe6150000 0 0x1000>, + <0 0xe6160060 0 0x4>; clocks = <&extal_clk>, <&extalr_clk>; clock-names = "extal", "extalr"; #clock-cells = <2>; diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 8be9424..3e5d5b0 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -305,7 +305,9 @@ cpg: clock-controller@e6150000 { compatible = "renesas,r8a7795-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; + reg = <0 0xe6150000 0 0x1000>, + /* MODEMR - Mode Monitor Register */ + <0 0xe6160060 0 0x4>; clocks = <&extal_clk>, <&extalr_clk>; clock-names = "extal", "extalr"; #clock-cells = <2>; diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c index 6af7f5b..ac34c11 100644 --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c @@ -612,26 +612,10 @@ struct clk * __init r8a7795_cpg_clk_register(struct device *dev, __clk_get_name(parent), 0, mult, div); } -/* - * Reset register definitions. - */ -#define MODEMR 0xe6160060 - -static u32 rcar_gen3_read_mode_pins(void) -{ - void __iomem *modemr = ioremap_nocache(MODEMR, 4); - u32 mode; - - BUG_ON(!modemr); - mode = ioread32(modemr); - iounmap(modemr); - - return mode; -} - -static int __init r8a7795_cpg_mssr_init(struct device *dev) +static int __init r8a7795_cpg_mssr_init(struct device *dev, + void __iomem *modemr_base) { - u32 cpg_mode = rcar_gen3_read_mode_pins(); + u32 cpg_mode = ioread32(modemr_base); cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; if (!cpg_pll_config->extal_div) { diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c index 1f2dc362..b455b14 100644 --- a/drivers/clk/renesas/renesas-cpg-mssr.c +++ b/drivers/clk/renesas/renesas-cpg-mssr.c @@ -107,6 +107,7 @@ static const u16 srcr[] = { struct cpg_mssr_priv { struct device *dev; void __iomem *base; + void __iomem *modemr_base; /* Mode Monitor Register */ spinlock_t mstp_lock; struct clk **clks; @@ -529,17 +530,25 @@ static int __init cpg_mssr_probe(struct platform_device *pdev) int error; info = of_match_node(cpg_mssr_match, np)->data; - if (info->init) { - error = info->init(dev); - if (error) - return error; - } priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; priv->dev = dev; + + if (info->init) { + /* get Mode Monitor Register */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + priv->modemr_base = devm_ioremap_resource(dev, res); + if (IS_ERR(priv->modemr_base)) + return PTR_ERR(priv->modemr_base); + + error = info->init(dev, priv->modemr_base); + if (error) + return error; + } + spin_lock_init(&priv->mstp_lock); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h index 0d1e3e8..3ec7e2d 100644 --- a/drivers/clk/renesas/renesas-cpg-mssr.h +++ b/drivers/clk/renesas/renesas-cpg-mssr.h @@ -123,7 +123,7 @@ struct cpg_mssr_info { unsigned int num_core_pm_clks; /* Callbacks */ - int (*init)(struct device *dev); + int (*init)(struct device *dev, void __iomem *modemr_base); struct clk *(*cpg_clk_register)(struct device *dev, const struct cpg_core_clk *core, const struct cpg_mssr_info *info,