From patchwork Tue May 3 15:56:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Franklin Cooper X-Patchwork-Id: 9005921 Return-Path: X-Original-To: patchwork-linux-clk@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 93DC4BF29F for ; Tue, 3 May 2016 16:01:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9E75E202D1 for ; Tue, 3 May 2016 16:01:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A0882202DD for ; Tue, 3 May 2016 16:01:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964800AbcECQBG (ORCPT ); Tue, 3 May 2016 12:01:06 -0400 Received: from mail-oi0-f68.google.com ([209.85.218.68]:34425 "EHLO mail-oi0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933820AbcECP5E (ORCPT ); Tue, 3 May 2016 11:57:04 -0400 Received: by mail-oi0-f68.google.com with SMTP id d139so3563058oig.1; Tue, 03 May 2016 08:57:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4h030s/Vg8dbV1lgovgv5cQ4AXhy+ygkbSvBcyxGLLQ=; b=eRN0w5RENtKwDEaazasPs1feXk4NBfu9jMW0lO+udUiADPoQWPWwvMincc8y3NKcoF XyLUJu88MNlfoBnYws/wPionabaEUUktqd0aCJKLrvI1WiARhPhdZQXxW3gMS+W5AXoV C8t9tdCOjSRJWfSFPoGs5sCBcB+VnufIWrGO7lAGTI9Wz9vXLZNmDcL1O9EB/S2Se/Ix VzSk/lfe6Vs/s/kiJkEf7DLGR1yu8WJZkK00qqit2vuV0F/Iny8IZl2smDfXk3tq1N8Q /KAoPBt1+hLDZdrif99La38f+d+vMxkAEq2SHGDtuEKUPHU98K8v5bFsf+kO3yzomhm3 +RVA== X-Gm-Message-State: AOPr4FUg3y6wgYLpo/kgqysmhzk0O5+jBqwq/K545erGL9+D8iiZc3PnwT/62/fEPQlang== X-Received: by 10.157.2.69 with SMTP id 63mr1617984otb.159.1462291022379; Tue, 03 May 2016 08:57:02 -0700 (PDT) Received: from beast-server.fios-router.home ([173.64.219.161]) by smtp.gmail.com with ESMTPSA id 131sm1245815oia.9.2016.05.03.08.57.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 03 May 2016 08:57:01 -0700 (PDT) From: Franklin S Cooper Jr To: thierry.reding@gmail.com, robh+dt@kernel.org, tony@atomide.com, linux@arm.linux.org.uk, paul@pwsan.com, t-kristo@ti.com, mturquette@baylibre.com, sboyd@codeaurora.org, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, vigneshr@ti.com, nsekhar@ti.com Cc: Franklin S Cooper Jr Subject: [PATCH v8 2/9] ARM: dts: am437x: Add missing compatibles to PWM binding documents Date: Tue, 3 May 2016 10:56:48 -0500 Message-Id: <1462291015-1919-3-git-send-email-fcooper@ti.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1462291015-1919-1-git-send-email-fcooper@ti.com> References: <1462291015-1919-1-git-send-email-fcooper@ti.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There are several SOC specific compatibles for ECAP, EHRPWM and PWMMS that are in use but aren't properly documented. Therefore, fix this by adding the compatibles to the appropriate binding documents. While at it make minor corrections to the binding document. Signed-off-by: Franklin S Cooper Jr Acked-by: Rob Herring --- .../devicetree/bindings/pwm/pwm-tiecap.txt | 12 ++++++++++-- .../devicetree/bindings/pwm/pwm-tiehrpwm.txt | 12 ++++++++++-- .../devicetree/bindings/pwm/pwm-tipwmss.txt | 21 +++++++++++++++++++-- 3 files changed, 39 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt b/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt index fb81179..788da6c 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-tiecap.txt @@ -2,8 +2,9 @@ TI SOC ECAP based APWM controller Required properties: - compatible: Must be "ti,-ecap". - for am33xx - compatible = "ti,am33xx-ecap"; - for da850 - compatible = "ti,da850-ecap", "ti,am33xx-ecap"; + for am33xx - compatible = "ti,am33xx-ecap"; + for am4372 - compatible = "ti,am4372-ecap", "ti,am33xx-ecap"; + for da850 - compatible = "ti,da850-ecap", "ti,am33xx-ecap"; - #pwm-cells: should be 3. See pwm.txt in this directory for a description of the cells format. The PWM channel index ranges from 0 to 4. The only third cell flag supported by this binding is PWM_POLARITY_INVERTED. @@ -22,6 +23,13 @@ ecap0: ecap@0 { /* ECAP on am33xx */ ti,hwmods = "ecap0"; }; +ecap0: ecap@0 { /* ECAP on am4372 */ + compatible = "ti,am4372-ecap", "ti,am33xx-ecap"; + #pwm-cells = <3>; + reg = <0x48300100 0x80>; + ti,hwmods = "ecap0"; +}; + ecap0: ecap@0 { /* ECAP on da850 */ compatible = "ti,da850-ecap", "ti,am33xx-ecap"; #pwm-cells = <3>; diff --git a/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt index 9c100b2..99b544f 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt @@ -2,8 +2,9 @@ TI SOC EHRPWM based PWM controller Required properties: - compatible: Must be "ti,-ehrpwm". - for am33xx - compatible = "ti,am33xx-ehrpwm"; - for da850 - compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; + for am33xx - compatible = "ti,am33xx-ehrpwm"; + for am4372 - compatible = "ti,am4372-ehrpwm", "ti,am33xx-ehrpwm"; + for da850 - compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; - #pwm-cells: should be 3. See pwm.txt in this directory for a description of the cells format. The only third cell flag supported by this binding is PWM_POLARITY_INVERTED. @@ -22,6 +23,13 @@ ehrpwm0: ehrpwm@0 { /* EHRPWM on am33xx */ ti,hwmods = "ehrpwm0"; }; +ehrpwm0: ehrpwm@0 { /* EHRPWM on am4372 */ + compatible = "ti,am4372-ehrpwm", "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48300200 0x80>; + ti,hwmods = "ehrpwm0"; +}; + ehrpwm0: ehrpwm@0 { /* EHRPWM on da850 */ compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; #pwm-cells = <3>; diff --git a/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt b/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt index f7eae77..fd8e87c 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt @@ -1,7 +1,10 @@ TI SOC based PWM Subsystem Required properties: -- compatible: Must be "ti,am33xx-pwmss"; +- compatible: Must be "ti,-pwmss". + for am33xx - compatible = "ti,am33xx-pwmss"; + for am4372 - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; + - reg: physical base address and size of the registers map. - address-cells: Specify the number of u32 entries needed in child nodes. Should set to 1. @@ -16,7 +19,7 @@ Required properties: Also child nodes should also populated under PWMSS DT node. Example: -pwmss0: pwmss@48300000 { +epwmss0: epwmss@48300000 { /* PWMSS for am33xx */ compatible = "ti,am33xx-pwmss"; reg = <0x48300000 0x10>; ti,hwmods = "epwmss0"; @@ -29,3 +32,17 @@ pwmss0: pwmss@48300000 { /* child nodes go here */ }; + +epwmss0: epwmss@48300000 { /* PWMSS for am4372 */ + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss" + reg = <0x48300000 0x10>; + ti,hwmods = "epwmss0"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + ranges = <0x48300100 0x48300100 0x80 /* ECAP */ + 0x48300180 0x48300180 0x80 /* EQEP */ + 0x48300200 0x48300200 0x80>; /* EHRPWM */ + + /* child nodes go here */ +};