From patchwork Mon May 16 12:47:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 9102321 Return-Path: X-Original-To: patchwork-linux-clk@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5CDA19F1C1 for ; Mon, 16 May 2016 12:47:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8EF0620279 for ; Mon, 16 May 2016 12:47:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8E5CC202AE for ; Mon, 16 May 2016 12:47:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752322AbcEPMrh (ORCPT ); Mon, 16 May 2016 08:47:37 -0400 Received: from down.free-electrons.com ([37.187.137.238]:38138 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753267AbcEPMrd (ORCPT ); Mon, 16 May 2016 08:47:33 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 31680A43; Mon, 16 May 2016 14:47:32 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 0371D281; Mon, 16 May 2016 14:47:31 +0200 (CEST) From: Maxime Ripard To: Rob Herring , Chen-Yu Tsai , Mike Turquette , Stephen Boyd , Daniel Vetter , David Airlie Cc: Boris Brezillon , Laurent Pinchart , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Maxime Ripard Subject: [PATCH 06/20] drm/sun4i: allow dclk to modify its parent rate Date: Mon, 16 May 2016 14:47:06 +0200 Message-Id: <1463402840-17062-7-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.8.2 In-Reply-To: <1463402840-17062-1-git-send-email-maxime.ripard@free-electrons.com> References: <1463402840-17062-1-git-send-email-maxime.ripard@free-electrons.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The pixel clock being only a divider of its parent clock, depending on the resolution, it's expected to change its parent rate. Add that flag so that the clock framework knows it. Fixes: 9026e0d122ac ("drm: Add Allwinner A10 Display Engine support") Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_dotclock.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_dotclock.c b/drivers/gpu/drm/sun4i/sun4i_dotclock.c index 1ddf6d7a7107..5b3463197c48 100644 --- a/drivers/gpu/drm/sun4i/sun4i_dotclock.c +++ b/drivers/gpu/drm/sun4i/sun4i_dotclock.c @@ -170,6 +170,7 @@ int sun4i_dclk_create(struct device *dev, struct sun4i_tcon *tcon) init.ops = &sun4i_dclk_ops; init.parent_names = &parent_name; init.num_parents = 1; + init.flags = CLK_SET_RATE_PARENT; dclk->regmap = tcon->regs; dclk->hw.init = &init;