diff mbox

[7/7] arm64: dts: gxbb clock controller

Message ID 1465518774-26924-8-git-send-email-mturquette@baylibre.com (mailing list archive)
State Accepted, archived
Delegated to: Michael Turquette
Headers show

Commit Message

Michael Turquette June 10, 2016, 12:32 a.m. UTC
Add the clock controller node for the AmLogic GXBB machine.

Signed-off-by: Michael Turquette <mturquette@baylibre.com>
---
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Kevin Hilman June 14, 2016, 7:01 p.m. UTC | #1
Michael Turquette <mturquette@baylibre.com> writes:

> Add the clock controller node for the AmLogic GXBB machine.
>
> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
> ---
>  arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
> index 832815d..3badfab 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
> @@ -174,5 +174,12 @@
>  			#size-cells = <2>;
>  			ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
>  		};
> +
> +		clkc: clock-controller@c883c000 {
> +			compatible = "amlogic,gxbb-clkc";
> +			#clock-cells = <1>;
> +			reg = <0x0 0xc883c000 0x0 0x3db>;
> +		};
> +
>  	};
>  };

minor nit: could you put this under the (recently added) hibus node (at
offset 0).  See the DT in my for-next branch for reference:

https://git.kernel.org/cgit/linux/kernel/git/khilman/linux-amlogic.git/log/?h=for-next

Thanks,

Kevin
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diff mbox

Patch

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index 832815d..3badfab 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -174,5 +174,12 @@ 
 			#size-cells = <2>;
 			ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
 		};
+
+		clkc: clock-controller@c883c000 {
+			compatible = "amlogic,gxbb-clkc";
+			#clock-cells = <1>;
+			reg = <0x0 0xc883c000 0x0 0x3db>;
+		};
+
 	};
 };