From patchwork Fri Jun 10 10:12:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laxman Dewangan X-Patchwork-Id: 9169389 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2731F60573 for ; Fri, 10 Jun 2016 10:26:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 15C3D26490 for ; Fri, 10 Jun 2016 10:26:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0A8752833F; Fri, 10 Jun 2016 10:26:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9585026490 for ; Fri, 10 Jun 2016 10:26:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161076AbcFJK0C (ORCPT ); Fri, 10 Jun 2016 06:26:02 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:7137 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932299AbcFJKZy (ORCPT ); Fri, 10 Jun 2016 06:25:54 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Fri, 10 Jun 2016 03:25:43 -0700 Received: from HQMAIL106.nvidia.com ([172.18.146.12]) by hqnvupgp07.nvidia.com (PGP Universal service); Fri, 10 Jun 2016 03:22:37 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Fri, 10 Jun 2016 03:22:37 -0700 Received: from BGMAIL104.nvidia.com (10.25.59.13) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Fri, 10 Jun 2016 10:25:52 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by bgmail104.nvidia.com (10.25.59.13) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Fri, 10 Jun 2016 10:25:48 +0000 Received: from ldewanganubuntu-System-Product-Name.nvidia.com (172.20.13.39) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server id 15.0.1130.7 via Frontend Transport; Fri, 10 Jun 2016 10:25:46 +0000 From: Laxman Dewangan To: , , CC: , , , Laxman Dewangan Subject: [PATCH 1/2] clk: max77620: Add DT binding doc for MAX77620 clock Date: Fri, 10 Jun 2016 15:42:15 +0530 Message-ID: <1465553536-23838-1-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 2.1.4 MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP MAXIM MAX77620 is the power management IC with multiple DCDC/LDO regulators, RTC, GPIOs, Watchdog, 32KHz clock source etc. Add DT binding doc for the details of the properties for MAX76620 clocks. Signed-off-by: Laxman Dewangan --- .../devicetree/bindings/clock/clk-max77620.txt | 31 ++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/clk-max77620.txt diff --git a/Documentation/devicetree/bindings/clock/clk-max77620.txt b/Documentation/devicetree/bindings/clock/clk-max77620.txt new file mode 100644 index 0000000..cda6ef7 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/clk-max77620.txt @@ -0,0 +1,31 @@ +* Maxim MAX77620 32KHz clocks * + +Maxim Power Management IC (PMIC) has clock output pins for 32KHz. + +This binding uses the common clock binding ./clock-bindings.txt. + +Required Properties: +-------------------- + +-#clock-cells : shall be set to 0. + +Example: + +#include +... + +i2c@7000d000 { + spmic: max77620@3c { + compatible = "maxim,max77620"; + ::::: + #clock-cells = <0>; + ::: + }; +}; + +bluetooth { + compatible = "bcom,bluuetooth-device"; + clocks = <&smic>; + clock-names = "in-32k"; + ::: +};