From patchwork Wed Jun 29 08:45:55 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 9204459 X-Patchwork-Delegate: mturquette@baylibre.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1579A607D8 for ; Wed, 29 Jun 2016 08:46:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 041E228621 for ; Wed, 29 Jun 2016 08:46:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EB92D2864A; Wed, 29 Jun 2016 08:46:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 96CAC28621 for ; Wed, 29 Jun 2016 08:46:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752016AbcF2IqS (ORCPT ); Wed, 29 Jun 2016 04:46:18 -0400 Received: from mail-pa0-f47.google.com ([209.85.220.47]:36175 "EHLO mail-pa0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751960AbcF2IqL (ORCPT ); Wed, 29 Jun 2016 04:46:11 -0400 Received: by mail-pa0-f47.google.com with SMTP id wo6so15437880pac.3 for ; Wed, 29 Jun 2016 01:46:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UKTxLiTlkJj/N8zJfC/WyfaogpqJJ2bJcGOR33wJ0lY=; b=fxm2mnwlVrcKL/cn9/LfbzFJ7DriRRfvSwLJMFvnQNVYoqh3bE8z3aQPaWNfYzwm3Z bi/n8XPavZnXIfUweqsgj3tF1/NGWNkE1jRQbMng4uzDIYKYIA1btSr4efa87n7XDGE1 XnFgMUAlNDJhQ49dPMTXe9ibNplFzb3BeXndQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UKTxLiTlkJj/N8zJfC/WyfaogpqJJ2bJcGOR33wJ0lY=; b=NuKcESpmwyVtasmZleP9GZl3NRuNOvBsYgp/xkrtzCVVYAh73jac1SUb4XH7KFKwL7 25c7GyNcHrmBeIzJfqlhAjMDigszUKpZcf7k1yYYIYjXecZY+VeC+eGxJQXhMqtSWZpu Jexd8bhdqMgTFLrKOK2boe1aPrNrmMNQoW9NDLgo/yxXEYY3YGlTUvATa2CBMmWqb+vy gZPLCp5DOItayavUJD5NdDunE0SqfpNeZxb+GPhLpcPUa60UBukEoYyI5wcsWeWs/BGf pktAUDsRxpMhu+nPhPU7hHnfqgcQ9hhMDYmRNWr2+b1iDGhtBRX2GRuC7Yfr+538N5xo 46JA== X-Gm-Message-State: ALyK8tIoTfAGDLPUKxFCb6KaIjwIfGcpy2HPkwSpLpTNVVmR2NvsyRyN41j5F+7nBx0s7EoD X-Received: by 10.66.25.8 with SMTP id y8mr9628804paf.106.1467189970842; Wed, 29 Jun 2016 01:46:10 -0700 (PDT) Received: from localhost.localdomain ([104.237.91.159]) by smtp.gmail.com with ESMTPSA id z88sm3857749pfa.59.2016.06.29.01.46.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 29 Jun 2016 01:46:10 -0700 (PDT) From: Guodong Xu To: mturquette@baylibre.com, sboyd@codeaurora.org, jorge.ramirez-ortiz@linaro.org, xinliang.liu@linaro.org, guodong.xu@linaro.org, john.stultz@linaro.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v2 2/2] clk: hi6220: initialize UART1 clock to 150MHz Date: Wed, 29 Jun 2016 16:45:55 +0800 Message-Id: <1467189955-21694-2-git-send-email-guodong.xu@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1467189955-21694-1-git-send-email-guodong.xu@linaro.org> References: <1467189955-21694-1-git-send-email-guodong.xu@linaro.org> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jorge Ramirez-Ortiz Early at boot, during the sys_clk initialization, make sure UART1 uses the higher frequency clock, 150MHz. This enables support for higher baud rates (up to 3Mbps) in UART1, which is required by faster bluetooth transfers. v2: use clk_set_rate() to propergate clock settings. Signed-off-by: Jorge Ramirez-Ortiz Signed-off-by: Guodong Xu --- drivers/clk/hisilicon/clk-hi6220.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/hisilicon/clk-hi6220.c b/drivers/clk/hisilicon/clk-hi6220.c index a36ffcb..631c56f 100644 --- a/drivers/clk/hisilicon/clk-hi6220.c +++ b/drivers/clk/hisilicon/clk-hi6220.c @@ -12,6 +12,7 @@ #include #include +#include #include #include #include @@ -192,6 +193,9 @@ static void __init hi6220_clk_sys_init(struct device_node *np) hi6220_clk_register_divider(hi6220_div_clks_sys, ARRAY_SIZE(hi6220_div_clks_sys), clk_data); + + if (clk_set_rate(clk_data->clk_data.clks[HI6220_UART1_SRC], 150000000)) + pr_err("failed to set uart1 clock rate\n"); } CLK_OF_DECLARE(hi6220_clk_sys, "hisilicon,hi6220-sysctrl", hi6220_clk_sys_init);