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[3/3] clk: Loongson1: Make use of GENMASK

Message ID 1470999108-9851-4-git-send-email-keguang.zhang@gmail.com (mailing list archive)
State Changes Requested, archived
Delegated to: Stephen Boyd
Headers show

Commit Message

Keguang Zhang Aug. 12, 2016, 10:51 a.m. UTC
From: Kelvin Cheung <keguang.zhang@gmail.com>

Make use of GENMASK instead of open coding the equivalent operation,
and update the PLL formula.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
---
 drivers/clk/loongson1/clk-loongson1b.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Stephen Boyd Aug. 19, 2016, 12:04 a.m. UTC | #1
On 08/12, Keguang Zhang wrote:
> From: Kelvin Cheung <keguang.zhang@gmail.com>
> 
> Make use of GENMASK instead of open coding the equivalent operation,
> and update the PLL formula.

Was the old formula broken? I would expect a bug fix like this to
be first in the series and be backported to any affected stable
trees.
diff mbox

Patch

diff --git a/drivers/clk/loongson1/clk-loongson1b.c b/drivers/clk/loongson1/clk-loongson1b.c
index 2302ee5..5cedb28 100644
--- a/drivers/clk/loongson1/clk-loongson1b.c
+++ b/drivers/clk/loongson1/clk-loongson1b.c
@@ -26,7 +26,7 @@  static unsigned long ls1x_pll_recalc_rate(struct clk_hw *hw,
 	u32 pll, rate;
 
 	pll = __raw_readl(LS1X_CLK_PLL_FREQ);
-	rate = 12 + (pll & 0x3f) + (((pll >> 8) & 0x3ff) >> 10);
+	rate = 12 + (pll & GENMASK(5, 0));
 	rate *= OSC;
 	rate >>= 1;