From patchwork Sat Sep 3 00:40:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: hotran X-Patchwork-Id: 9311817 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C8FE6607D2 for ; Sat, 3 Sep 2016 00:41:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BA1F629862 for ; Sat, 3 Sep 2016 00:41:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AEC4729880; Sat, 3 Sep 2016 00:41:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8722F29862 for ; Sat, 3 Sep 2016 00:41:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752313AbcICAlQ (ORCPT ); Fri, 2 Sep 2016 20:41:16 -0400 Received: from mail-pf0-f181.google.com ([209.85.192.181]:33890 "EHLO mail-pf0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752462AbcICAlO (ORCPT ); Fri, 2 Sep 2016 20:41:14 -0400 Received: by mail-pf0-f181.google.com with SMTP id p64so47003345pfb.1 for ; Fri, 02 Sep 2016 17:41:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=apm.com; s=apm; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xZ6n+tnu0fenh4PBgsUBtAfkQL8MObib4dDWKrNF9Bg=; b=cMo1gYT5hgOXlxTwFbpA06g2rh6jxgtudwKh0O1bcLsX7esNF0H074Ip9i7KjJxk6f Tltmf75Sd9BHQU+RVEPxux+Xzlz6ch1DkckCpOvJVUKdfHNHd4QDJpMrV130OjxanIva Rjoukx9oaeBsqad8wj0EOUaFLl87BJM92jZXM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=xZ6n+tnu0fenh4PBgsUBtAfkQL8MObib4dDWKrNF9Bg=; b=Qg4P7Yydyu280np1pzqSuxG//b3jivOKml+ePmiTfWAy24+TZnUjWfiBVVXl0Hm7jo 0ZAAyIBtIfe3bToeDHmITEhzCe4rgD8NjKnkniNdqenG7RjnB1jz3DZkWwfIzEaVEMCM fDw757H6BFMQXny2/6s4B+7z8ZXZcNrfEE8iZS/syGP9cBTwh8B3OwKnhKlXius4oxwk Vdg6iBvM25GQeLFeGR/gG679NkBdCjp6JlFX5yuAyCzIlLNQM3AWfcJkpIR3NwSKudkp iK4H5qU9v/PoeIoCuNuYPW1tYSP/W3pwly5nItHP6NKUDLmvXy6FbqHsnwFp4n0j85S5 SvJA== X-Gm-Message-State: AE9vXwMnGRyL9s8PYmYGH5zaCr68oiZOnEC6fFe4i8r+XIcjFbr8GsyLcrr9ltHfrfsOjyPn X-Received: by 10.98.11.65 with SMTP id t62mr8945943pfi.51.1472863273297; Fri, 02 Sep 2016 17:41:13 -0700 (PDT) Received: from hotran_localhost.amcc.com ([206.80.4.98]) by smtp.gmail.com with ESMTPSA id f84sm17274407pfd.87.2016.09.02.17.41.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 02 Sep 2016 17:41:12 -0700 (PDT) From: Hoan Tran To: Michael Turquette , Rob Herring , Stephen Boyd , Mark Rutland Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, lho@apm.com, Duc Dang , Hoan Tran Subject: [PATCH v2 1/3] Documentation: dtb: xgene: Add PMD clock binding Date: Fri, 2 Sep 2016 17:40:53 -0700 Message-Id: <1472863255-32337-2-git-send-email-hotran@apm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1472863255-32337-1-git-send-email-hotran@apm.com> References: <1472863255-32337-1-git-send-email-hotran@apm.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add APM X-Gene clock binding documentation for PMD clock. Signed-off-by: Hoan Tran Acked-by: Rob Herring --- Documentation/devicetree/bindings/clock/xgene.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/xgene.txt b/Documentation/devicetree/bindings/clock/xgene.txt index 82f9638..e6e12ae 100644 --- a/Documentation/devicetree/bindings/clock/xgene.txt +++ b/Documentation/devicetree/bindings/clock/xgene.txt @@ -8,6 +8,7 @@ Required properties: - compatible : shall be one of the following: "apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock "apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock + "apm,xgene-pmd-clock" - for a X-Gene PMD clock "apm,xgene-device-clock" - for a X-Gene device clock "apm,xgene-socpll-v2-clock" - for a X-Gene SoC PLL v2 clock "apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock @@ -22,6 +23,15 @@ Required properties for SoC or PCP PLL clocks: Optional properties for PLL clocks: - clock-names : shall be the name of the PLL. If missing, use the device name. +Required properties for PMD clocks: +- reg : shall be the physical register address for the pmd clock. +- clocks : shall be the input parent clock phandle for the clock. +- #clock-cells : shall be set to 1. +- clock-output-names : shall be the name of the clock referenced by derive + clock. +Optional properties for PLL clocks: +- clock-names : shall be the name of the clock. If missing, use the device name. + Required properties for device clocks: - reg : shall be a list of address and length pairs describing the CSR reset and/or the divider. Either may be omitted, but at least @@ -59,6 +69,14 @@ For example: type = <0>; }; + pmd0clk: pmd0clk { + compatible = "apm,xgene-pmd-clock"; + #clock-cells = <1>; + clocks = <&pmdpll 0>; + reg = <0x0 0x7E200200 0x0 0x10>; + clock-output-names = "pmd0clk"; + }; + socpll: socpll@17000120 { compatible = "apm,xgene-socpll-clock"; #clock-cells = <1>;