| Message ID | 1476876523-27378-2-git-send-email-rnayak@codeaurora.org (mailing list archive) |
|---|---|
| State | Rejected, archived |
| Delegated to: | Stephen Boyd |
| Headers | show |
On 10/19, Rajendra Nayak wrote: > We seem to have a few branch clocks within gcc for msm8996 which do > have a valid halt bit but can't be used to check branch enable/disable > status as they rely on external clocks in some cases and in some > others only toggle during an ongoing bus transaction. > Mark these with BRANCH_HALT_DELAY, so we just add a delay instead. > > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> > --- Srini tells me that if the pcie pipe clocks are enabled after the phy is powered up things work fine and the halt bit checks work. So I don't think we need this patch. Probably the drivers are enabling all their clocks at probe instead of understanding that the phy is outputting a clock that goes into gcc to be gated and then back out into their controller and/or phy. Also, note that these clocks have parents that should be populated by the phys, but so far we haven't done that. That should be fixed as well.
On 11/03/2016 02:09 AM, Stephen Boyd wrote: > On 10/19, Rajendra Nayak wrote: >> We seem to have a few branch clocks within gcc for msm8996 which do >> have a valid halt bit but can't be used to check branch enable/disable >> status as they rely on external clocks in some cases and in some >> others only toggle during an ongoing bus transaction. >> Mark these with BRANCH_HALT_DELAY, so we just add a delay instead. >> >> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> >> --- > > Srini tells me that if the pcie pipe clocks are enabled after the > phy is powered up things work fine and the halt bit checks work. > So I don't think we need this patch. Probably the drivers are > enabling all their clocks at probe instead of understanding that > the phy is outputting a clock that goes into gcc to be gated and > then back out into their controller and/or phy. Sure, I will take a look to see if the usb and ufs clocks show the same behavior, in which case we won't need this patch. > > Also, note that these clocks have parents that should be > populated by the phys, but so far we haven't done that. That > should be fixed as well. >
diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c index fe03e6f..4e78924 100644 --- a/drivers/clk/qcom/gcc-msm8996.c +++ b/drivers/clk/qcom/gcc-msm8996.c @@ -1388,7 +1388,7 @@ enum { }; static struct clk_branch gcc_usb3_phy_pipe_clk = { - .halt_reg = 0x50004, + .halt_check = BRANCH_HALT_DELAY, .clkr = { .enable_reg = 0x50004, .enable_mask = BIT(0), @@ -2442,7 +2442,7 @@ enum { }; static struct clk_branch gcc_pcie_0_pipe_clk = { - .halt_reg = 0x6b018, + .halt_check = BRANCH_HALT_DELAY, .clkr = { .enable_reg = 0x6b018, .enable_mask = BIT(0), @@ -2517,7 +2517,7 @@ enum { }; static struct clk_branch gcc_pcie_1_pipe_clk = { - .halt_reg = 0x6d018, + .halt_check = BRANCH_HALT_DELAY, .clkr = { .enable_reg = 0x6d018, .enable_mask = BIT(0), @@ -2592,7 +2592,7 @@ enum { }; static struct clk_branch gcc_pcie_2_pipe_clk = { - .halt_reg = 0x6e018, + .halt_check = BRANCH_HALT_DELAY, .clkr = { .enable_reg = 0x6e018, .enable_mask = BIT(0), @@ -2721,7 +2721,7 @@ enum { }; static struct clk_branch gcc_ufs_tx_symbol_0_clk = { - .halt_reg = 0x75018, + .halt_check = BRANCH_HALT_DELAY, .clkr = { .enable_reg = 0x75018, .enable_mask = BIT(0), @@ -2736,7 +2736,7 @@ enum { }; static struct clk_branch gcc_ufs_rx_symbol_0_clk = { - .halt_reg = 0x7501c, + .halt_check = BRANCH_HALT_DELAY, .clkr = { .enable_reg = 0x7501c, .enable_mask = BIT(0), @@ -2751,7 +2751,7 @@ enum { }; static struct clk_branch gcc_ufs_rx_symbol_1_clk = { - .halt_reg = 0x75020, + .halt_check = BRANCH_HALT_DELAY, .clkr = { .enable_reg = 0x75020, .enable_mask = BIT(0),
We seem to have a few branch clocks within gcc for msm8996 which do have a valid halt bit but can't be used to check branch enable/disable status as they rely on external clocks in some cases and in some others only toggle during an ongoing bus transaction. Mark these with BRANCH_HALT_DELAY, so we just add a delay instead. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> --- drivers/clk/qcom/gcc-msm8996.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)