From patchwork Thu Oct 20 09:38:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 9386423 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2123960CDC for ; Thu, 20 Oct 2016 09:38:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 100F629B9B for ; Thu, 20 Oct 2016 09:38:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0289D29B9E; Thu, 20 Oct 2016 09:38:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9036B29B9E for ; Thu, 20 Oct 2016 09:38:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757948AbcJTJih (ORCPT ); Thu, 20 Oct 2016 05:38:37 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:60648 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758731AbcJTJic (ORCPT ); Thu, 20 Oct 2016 05:38:32 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 9A9F661B2F; Thu, 20 Oct 2016 09:38:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1476956311; bh=v8eaoUUiIEYMKh/903GVnouWgpOyxR3fy9EF7Gex8+w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PHeVCYAXviRCgVsf75F8obnUfJYceancO7FTpB2S37DRru7dU6KZb6sknOhYqx7cu I70V5orFiCYFGcdUY8vYUMboBdw6ga+1mj1gFYZtHl9wMu6MStSCjKXhVH2ORbpP2I ukYCQeke06z1MpB41CWz4VA+xg5QDIPi42Urbuvc= Received: from blr-ubuntu-34.ap.qualcomm.com (unknown [202.46.23.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 77B8F61AEF; Thu, 20 Oct 2016 09:38:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1476956311; bh=v8eaoUUiIEYMKh/903GVnouWgpOyxR3fy9EF7Gex8+w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PHeVCYAXviRCgVsf75F8obnUfJYceancO7FTpB2S37DRru7dU6KZb6sknOhYqx7cu I70V5orFiCYFGcdUY8vYUMboBdw6ga+1mj1gFYZtHl9wMu6MStSCjKXhVH2ORbpP2I ukYCQeke06z1MpB41CWz4VA+xg5QDIPi42Urbuvc= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 77B8F61AEF Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: sboyd@codeaurora.org, mturquette@baylibre.com Cc: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, robdclark@gmail.com, jcrouse@codeaurora.org, Rajendra Nayak Subject: [PATCH 2/2] clk: qcom: mmcc-8996: Add gpu gdscs Date: Thu, 20 Oct 2016 15:08:07 +0530 Message-Id: <1476956287-13749-3-git-send-email-rnayak@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1476956287-13749-1-git-send-email-rnayak@codeaurora.org> References: <1476956287-13749-1-git-send-email-rnayak@codeaurora.org> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add gpu gdsc data for msm8996 Signed-off-by: Rajendra Nayak --- drivers/clk/qcom/mmcc-msm8996.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/clk/qcom/mmcc-msm8996.c b/drivers/clk/qcom/mmcc-msm8996.c index ca97e11..f77206f 100644 --- a/drivers/clk/qcom/mmcc-msm8996.c +++ b/drivers/clk/qcom/mmcc-msm8996.c @@ -3034,6 +3034,28 @@ enum { .pwrsts = PWRSTS_OFF_ON, }; +static struct gdsc gpu_gdsc = { + .gdscr = 0x4034, + .gds_hw_ctrl = 0x4038, + .pd = { + .name = "gpu", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = VOTABLE, +}; + +static struct gdsc gpu_gx_gdsc = { + .gdscr = 0x4024, + .clamp_io_ctrl = 0x4300, + .cxcs = (unsigned int []){ 0x4028 }, + .cxc_count = 1, + .pd = { + .name = "gpu_gx", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = CLAMP_IO, +}; + static struct clk_regmap *mmcc_msm8996_clocks[] = { [MMPLL0_EARLY] = &mmpll0_early.clkr, [MMPLL0_PLL] = &mmpll0.clkr, @@ -3223,6 +3245,8 @@ enum { [CPP_GDSC] = &cpp_gdsc, [FD_GDSC] = &fd_gdsc, [MDSS_GDSC] = &mdss_gdsc, + [GPU_GDSC] = &gpu_gdsc, + [GPU_GX_GDSC] = &gpu_gx_gdsc, }; static const struct qcom_reset_map mmcc_msm8996_resets[] = {