Message ID | 1479955015-37514-1-git-send-email-yuantian.tang@nxp.com (mailing list archive) |
---|---|
State | Accepted, archived |
Delegated to: | Stephen Boyd |
Headers | show |
On 11/23/2016 08:50 PM, yuantian.tang@nxp.com wrote: > From: Tang Yuantian <Yuantian.Tang@nxp.com> > > Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> > --- > v3: > - rebased to latest kernel and re-sorted the code [snip] > @@ -1316,6 +1334,7 @@ CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init); > CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init); > CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init); > CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", clockgen_init); > +CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", clockgen_init); > CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init); You need a better sorting algorithm. :-P -Scott -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Scott, > -----Original Message----- > From: Scott Wood > Sent: Thursday, November 24, 2016 4:21 PM > To: Y.T. Tang <yuantian.tang@nxp.com>; mturquette@baylibre.com > Cc: sboyd@codeaurora.org; linux-clk@vger.kernel.org; linux- > kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org > Subject: Re: [PATCH v3] clk: qoriq: added ls1012a clock configuration > > On 11/23/2016 08:50 PM, yuantian.tang@nxp.com wrote: > > From: Tang Yuantian <Yuantian.Tang@nxp.com> > > > > Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> > > --- > > v3: > > - rebased to latest kernel and re-sorted the code > [snip] > > @@ -1316,6 +1334,7 @@ CLK_OF_DECLARE(qoriq_clockgen_2, > > "fsl,qoriq-clockgen-2.0", clockgen_init); > > CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", > > clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls1043a, > > "fsl,ls1043a-clockgen", clockgen_init); > > CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", > > clockgen_init); > > +CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", > > +clockgen_init); > > CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", > > clockgen_init); > > You need a better sorting algorithm. :-P > I don't think so. This time, each code snip goes right after ls1046a. The sorting 'algorithm' is best ever. :) Regards, Yuantian > -Scott -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 11/25, Y.T. Tang wrote: > Hi Scott, > > > -----Original Message----- > > From: Scott Wood > > Sent: Thursday, November 24, 2016 4:21 PM > > To: Y.T. Tang <yuantian.tang@nxp.com>; mturquette@baylibre.com > > Cc: sboyd@codeaurora.org; linux-clk@vger.kernel.org; linux- > > kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org > > Subject: Re: [PATCH v3] clk: qoriq: added ls1012a clock configuration > > > > On 11/23/2016 08:50 PM, yuantian.tang@nxp.com wrote: > > > From: Tang Yuantian <Yuantian.Tang@nxp.com> > > > > > > Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> > > > --- > > > v3: > > > - rebased to latest kernel and re-sorted the code > > [snip] > > > @@ -1316,6 +1334,7 @@ CLK_OF_DECLARE(qoriq_clockgen_2, > > > "fsl,qoriq-clockgen-2.0", clockgen_init); > > > CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", > > > clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls1043a, > > > "fsl,ls1043a-clockgen", clockgen_init); > > > CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", > > > clockgen_init); > > > +CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", > > > +clockgen_init); > > > CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", > > > clockgen_init); > > > > You need a better sorting algorithm. :-P > > > I don't think so. This time, each code snip goes right after ls1046a. > The sorting 'algorithm' is best ever. :) > I will sort it and apply it? Ack Scott?
On 12/08/2016 05:10 PM, sboyd@codeaurora.org wrote: > On 11/25, Y.T. Tang wrote: >> Hi Scott, >> >>> -----Original Message----- >>> From: Scott Wood >>> Sent: Thursday, November 24, 2016 4:21 PM >>> To: Y.T. Tang <yuantian.tang@nxp.com>; mturquette@baylibre.com >>> Cc: sboyd@codeaurora.org; linux-clk@vger.kernel.org; linux- >>> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org >>> Subject: Re: [PATCH v3] clk: qoriq: added ls1012a clock configuration >>> >>> On 11/23/2016 08:50 PM, yuantian.tang@nxp.com wrote: >>>> From: Tang Yuantian <Yuantian.Tang@nxp.com> >>>> >>>> Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> >>>> --- >>>> v3: >>>> - rebased to latest kernel and re-sorted the code >>> [snip] >>>> @@ -1316,6 +1334,7 @@ CLK_OF_DECLARE(qoriq_clockgen_2, >>>> "fsl,qoriq-clockgen-2.0", clockgen_init); >>>> CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", >>>> clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls1043a, >>>> "fsl,ls1043a-clockgen", clockgen_init); >>>> CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", >>>> clockgen_init); >>>> +CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", >>>> +clockgen_init); >>>> CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", >>>> clockgen_init); >>> >>> You need a better sorting algorithm. :-P >>> >> I don't think so. This time, each code snip goes right after ls1046a. >> The sorting 'algorithm' is best ever. :) >> > > I will sort it and apply it? Ack Scott? > Acked-by: Scott Wood <oss@buserror.net> -Scott -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index 7dd4351..697310e 100644 --- a/drivers/clk/clk-qoriq.c +++ b/drivers/clk/clk-qoriq.c @@ -291,6 +291,14 @@ static const struct clockgen_muxinfo ls1046a_hwa2 = { }, }; +static const struct clockgen_muxinfo ls1012a_cmux = { + { + [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 }, + {}, + [2] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 }, + } +}; + static const struct clockgen_muxinfo t1023_hwa1 = { { {}, @@ -529,6 +537,16 @@ static const struct clockgen_chipinfo chipinfo[] = { .flags = CG_PLL_8BIT, }, { + .compat = "fsl,ls1012a-clockgen", + .cmux_groups = { + &ls1012a_cmux + }, + .cmux_to_group = { + 0, -1 + }, + .pll_mask = 0x03, + }, + { .compat = "fsl,ls2080a-clockgen", .cmux_groups = { &clockgen2_cmux_cga12, &clockgen2_cmux_cgb @@ -1316,6 +1334,7 @@ CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", clockgen_init); +CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init); /* Legacy nodes */