From patchwork Thu Dec 29 13:36:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartlomiej Zolnierkiewicz X-Patchwork-Id: 9491219 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1628260838 for ; Thu, 29 Dec 2016 13:38:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0BCC11FFD6 for ; Thu, 29 Dec 2016 13:38:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0062F252D5; Thu, 29 Dec 2016 13:38:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4C7262018E for ; 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Thu, 29 Dec 2016 13:37:34 +0000 (GMT) X-AuditID: b6c32a2c-f79ad6d000007a0b-12-586511a0b6bd Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2new.samsung.com (EPCPMTA) with SMTP id 9A.DB.28332.E9115685; Thu, 29 Dec 2016 22:37:34 +0900 (KST) Received: from AMDC3058.DIGITAL.local ([106.120.53.102]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OIY00AMG8HZWM40@mmp2.samsung.com>; Thu, 29 Dec 2016 22:37:34 +0900 (KST) From: Bartlomiej Zolnierkiewicz To: Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , Michael Turquette , Stephen Boyd , Kukjin Kim , Kukjin Kim , Krzysztof Kozlowski , Javier Martinez Canillas Cc: Doug Anderson , Andreas Faerber , Thomas Abraham , Tobias Jakobi , Ben Gamari , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, b.zolnierkie@samsung.com Subject: [PATCH 2/2] ARM: dts: Add CPU OPPs for Exynos4412 Prime Date: Thu, 29 Dec 2016 14:36:51 +0100 Message-id: <1483018611-27998-3-git-send-email-b.zolnierkie@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1483018611-27998-1-git-send-email-b.zolnierkie@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAAz2Sa0hTYRjHfc/ZOTsTV6dp9uKNXJRoaRkGb5oxteCIUOEn6YstPajlZeyo aFkNw0szp2KWmebyRszA3GaXSZaXlLy0RCwxNEwl85KVgXdLd2bf/v/n+T+/h+flpXBJPeFE xSUms8pEebyUtBU8a/f08NbuYiOO1M/j6KaeQ42lDQQqqxwRoE9/vhGor66VRLNzTzCUrx0k UcH4DI7M5qdCpB//SKBft0cJNGAqJ9FCfgdApeYWDPV3n0btszkEWurNE6DcOoCy638SSGda AzIHZn4oS8g8UPULmAFNPsa8LBsRMnrdLZIx1NxgNjqFjLFgs6Ix6gDTuxrCGHquMgt6t3N2 521PRLPxcams8vDJC7axFVPFQLG8L808UiJQgTEXNRBRkPaDnw2LQl47wg+jDaQa2FISuhbA nuYNwJscDNZUd+PbE1kjkxjfKAdw0DBD8GYFwIq6dkuKpP1hUY7OMu5AL2DQrK60GJzOweHE j1ZLyp6WwdWGSnJLC+j9sFlTSmxpMc3Aosk71n1u8F1nsaUuokNh7+KacAsE6XUhHNA92qRS m8YV6t9Y86fg+9JyjNf2cLrLaL3OGa7XDgNe3wPw+SrkOQYAdc2F1lAAbO/qtyzD6R0wf3UC 4/limJst4SMMrOrMtPKDoLFng/z/Ft8Xm4hC4KIFNjrgyCq4hBiWO6bw9eHkCVxKYoxPVFKC Hli+kNehF2BUG9YGaApI7cSPJ6MjJIQ8lUtPaAOQwqUOYu+dbIREHC1Pv8IqkyKVKfEs1wac KYF0j1ibFhAhoWPkyexlllWwyu0uRomcVOB6ZmvamlOqMThDkzI1M2EzVjWXFegiqvLcuxwp VjtfI/pM4aqlV7IMU/N6l9Q09PCov3tP0FfR2yFVSfXr3OH+gwRR1KRYHmz8axfsmTFu7z5k 37ISmOda2XH8wG/NzJlQP1mYh9dkVIjxvh6TTYffHd69M73g4lkZLVZ/ueQvFXCxcl8vXMnJ /wGjOATMPgMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrDIsWRmVeSWpSXmKPExsVy+t9jQd15gqkRBj9fGVs0byq22DhjPavF rPl3WSyuf3nOanF22UE2izdv1zBZ9C64ymbR//g1s8X58xvYLTY9vsZq8bHnHqvF5V1z2Cw+ 9x5htJhxfh+TxcVTrhaH37SzWvw4081i0bGM0aJt9QdWi1W7/jA6iHi8v9HK7jG74SKLx+W+ XiaPnbPusntsWtXJ5rF5Sb3Hv2PsHlv6gSJ9W1Yxepz57eyx+XS1x+dNcgE8UW42GamJKalF Cql5yfkpmXnptkqhIW66FkoKeYm5qbZKEbq+IUFKCmWJOaVAnpEBGnBwDnAPVtK3S3DLmPti MmPBT+WK83ensjQwPpTpYuTkkBAwkWi9+5QJwhaTuHBvPVsXIxeHkMAsRonu3unMEM4vRomV 06ayg1SxCVhJTGxfxQiSEBH4zCTx5vxvsBZmgU5miZutk1hAqoQFHCR+r5/PBmKzCKhK7O6b wQpi8wp4SEx8OoUZYp+cxMljk8HinAKeEme+/wHbIARU8+L0drYJjLwLGBlWMUqkFiQXFCel 5xrlpZbrFSfmFpfmpesl5+duYgTH5DPpHYyHd7kfYhTgYFTi4T2hkBIhxJpYVlyZe4hRgoNZ SYRXlz81Qog3JbGyKrUoP76oNCe1+BCjKdBhE5mlRJPzgekiryTe0MTcxNzYwMLc0tLESEmc t3H2s3AhgfTEktTs1NSC1CKYPiYOTqkGxk5nx005f/u33E+eui5Xhntd5r8nzbyF20QKcw8k Mx61ldom/XCy5OOCyT8FK10j+I/HF10zUWrkV4/iN57E//yD5JVr2Q5fmA+rBy2tdT56touz u/oIx48nF/bLWSRxLQ58Xck6q+TygZurf9fui2gpVtJ4bFtjvCZmpfDOEI3MNTNeHPl9WIml OCPRUIu5qDgRAB/gFu/fAgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20161229133734epcas5p1e893904353c23170e82ece54a06aebed X-Msg-Generator: CA X-Sender-IP: 203.254.230.27 X-Local-Sender: =?UTF-8?B?QmFydGxvbWllaiBab2xuaWVya2lld2ljehtTUlBPTC1LZXJu?= =?UTF-8?B?ZWwgKFRQKRvsgrzshLHsoITsnpAbU2VuaW9yIFNvZnR3YXJlIEVuZ2luZWVy?= X-Global-Sender: =?UTF-8?B?QmFydGxvbWllaiBab2xuaWVya2lld2ljehtTUlBPTC1LZXJu?= =?UTF-8?B?ZWwgKFRQKRtTYW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBF?= =?UTF-8?B?bmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 105P X-HopCount: 7 X-CMS-RootMailID: 20161229133734epcas5p1e893904353c23170e82ece54a06aebed X-RootMTR: 20161229133734epcas5p1e893904353c23170e82ece54a06aebed References: <1483018611-27998-1-git-send-email-b.zolnierkie@samsung.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add CPU operating points for Exynos4412 Prime (it supports additional 1704MHz & 1600MHz OPPs and 1500MHz OPP is just a regular non-turbo OPP on this SoC). Also update relevant cooling maps to account for new OPPs. ODROID-X2/U2/U3 boards use Exynos4412 Prime SoC version so update their board files accordingly. Based on Hardkernel's kernel for ODROID-X2/U2/U3 boards. Cc: Doug Anderson Cc: Andreas Faerber Cc: Thomas Abraham Cc: Tobias Jakobi Cc: Ben Gamari Signed-off-by: Bartlomiej Zolnierkiewicz --- arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 4 +-- arch/arm/boot/dts/exynos4412-odroidu3.dts | 5 +-- arch/arm/boot/dts/exynos4412-odroidx2.dts | 1 + arch/arm/boot/dts/exynos4412-prime.dtsi | 41 +++++++++++++++++++++++++ arch/arm/boot/dts/exynos4412.dtsi | 2 +- 5 files changed, 48 insertions(+), 5 deletions(-) create mode 100644 arch/arm/boot/dts/exynos4412-prime.dtsi diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index 8aa19ba..5282d69e 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -97,11 +97,11 @@ thermal-zones { cpu_thermal: cpu-thermal { cooling-maps { - map0 { + cooling_map0: map0 { /* Corresponds to 800MHz at freq_table */ cooling-device = <&cpu0 7 7>; }; - map1 { + cooling_map1: map1 { /* Corresponds to 200MHz at freq_table */ cooling-device = <&cpu0 13 13>; }; diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts index 99634c5..7504a5a 100644 --- a/arch/arm/boot/dts/exynos4412-odroidu3.dts +++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts @@ -13,6 +13,7 @@ /dts-v1/; #include "exynos4412-odroid-common.dtsi" +#include "exynos4412-prime.dtsi" / { model = "Hardkernel ODROID-U3 board based on Exynos4412"; @@ -47,11 +48,11 @@ cooling-maps { map0 { trip = <&cpu_alert1>; - cooling-device = <&cpu0 7 7>; + cooling-device = <&cpu0 9 9>; }; map1 { trip = <&cpu_alert2>; - cooling-device = <&cpu0 13 13>; + cooling-device = <&cpu0 15 15>; }; map2 { trip = <&cpu_alert0>; diff --git a/arch/arm/boot/dts/exynos4412-odroidx2.dts b/arch/arm/boot/dts/exynos4412-odroidx2.dts index 4d22885..d6e92ebc 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx2.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx2.dts @@ -12,6 +12,7 @@ */ #include "exynos4412-odroidx.dts" +#include "exynos4412-prime.dtsi" / { model = "Hardkernel ODROID-X2 board based on Exynos4412"; diff --git a/arch/arm/boot/dts/exynos4412-prime.dtsi b/arch/arm/boot/dts/exynos4412-prime.dtsi new file mode 100644 index 0000000..e75bc17 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-prime.dtsi @@ -0,0 +1,41 @@ +/* + * Samsung's Exynos4412 Prime SoC device tree source + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * Exynos4412 Prime SoC revision supports higher CPU frequencies than + * non-Prime version. Therefore we need to update OPPs table and + * thermal maps accordingly. + */ + +&cpu0_opp_1500 { + /delete-property/turbo-mode; +}; + +&cpu0_opp_table { + opp@1600000000 { + opp-hz = /bits/ 64 <1600000000>; + opp-microvolt = <1350000>; + clock-latency-ns = <200000>; + }; + opp@1704000000 { + opp-hz = /bits/ 64 <1704000000>; + opp-microvolt = <1350000>; + clock-latency-ns = <200000>; + }; +}; + +&cooling_map0 { + cooling-device = <&cpu0 9 9>; +}; + +&cooling_map1 { + cooling-device = <&cpu0 15 15>; +}; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 40beede..3ebdf01 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -130,7 +130,7 @@ opp-microvolt = <1287500>; clock-latency-ns = <200000>; }; - opp@1500000000 { + cpu0_opp_1500: opp@1500000000 { opp-hz = /bits/ 64 <1500000000>; opp-microvolt = <1350000>; clock-latency-ns = <200000>;