From patchwork Tue Jan 10 01:27:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: zhengxing X-Patchwork-Id: 9506161 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 643BD602F0 for ; Tue, 10 Jan 2017 01:28:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5D3BA26C9B for ; Tue, 10 Jan 2017 01:28:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5170E28497; Tue, 10 Jan 2017 01:28:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F315526C9B for ; Tue, 10 Jan 2017 01:28:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S936043AbdAJB2Q (ORCPT ); Mon, 9 Jan 2017 20:28:16 -0500 Received: from regular1.263xmail.com ([211.150.99.133]:35190 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932123AbdAJB2P (ORCPT ); Mon, 9 Jan 2017 20:28:15 -0500 Received: from zhengxing?rock-chips.com (unknown [192.168.167.128]) by regular1.263xmail.com (Postfix) with ESMTP id 891338F03; Tue, 10 Jan 2017 09:28:07 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 420A341C; Tue, 10 Jan 2017 09:28:00 +0800 (CST) X-RL-SENDER: zhengxing@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: zhengxing@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: zhengxing@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [103.29.142.67]) by smtp.263.net (Postfix) whith ESMTP id 27282D9R8QH; Tue, 10 Jan 2017 09:28:06 +0800 (CST) From: Xing Zheng To: heiko@sntech.de Cc: dianders@google.com, linux-rockchip@lists.infradead.org, Xing Zheng , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , Douglas Anderson , Caesar Wang , Shawn Lin , Brian Norris , Jianqun Xu , Elaine Zhang , David Wu , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3] arm64: dts: rockchip: add "rockchip, grf" property for RK3399 PMUCRU/CRU Date: Tue, 10 Jan 2017 09:27:41 +0800 Message-Id: <1484011661-13474-1-git-send-email-zhengxing@rock-chips.com> X-Mailer: git-send-email 2.7.4 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The structure rockchip_clk_provider needs to refer the GRF regmap in somewhere, if the CRU node has not "rockchip,grf" property, calling syscon_regmap_lookup_by_phandle will return an invalid GRF regmap, and the MUXGRF type clock will be not supported. Therefore, we need to add them. Signed-off-by: Xing Zheng --- Changes in v3: - add optional roperty rockchip,grf in rockchip,rk3399-cru.txt Changes in v2: - referring pmugrf for PMUGRU - fix the typo "invaild" in COMMIT message Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt | 5 +++++ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++ 2 files changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt index 3888dd3..f476b3d 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt @@ -13,6 +13,11 @@ Required Properties: - #clock-cells: should be 1. - #reset-cells: should be 1. +Optional Properties: + +- rockchip,grf: phandle to the syscon managing the "general register files" + If missing pll rates are not changable, due to the missing pll lock status. + Each clock is assigned an identifier and client nodes can use this identifier to specify the clock which they consume. All available clocks are defined as preprocessor macros in the dt-bindings/clock/rk3399-cru.h headers and can be diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index c928015..081621b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1077,6 +1077,7 @@ pmucru: pmu-clock-controller@ff750000 { compatible = "rockchip,rk3399-pmucru"; reg = <0x0 0xff750000 0x0 0x1000>; + rockchip,grf = <&pmugrf>; #clock-cells = <1>; #reset-cells = <1>; assigned-clocks = <&pmucru PLL_PPLL>; @@ -1086,6 +1087,7 @@ cru: clock-controller@ff760000 { compatible = "rockchip,rk3399-cru"; reg = <0x0 0xff760000 0x0 0x1000>; + rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; assigned-clocks =