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nxp.com; dkim=none (message not signed) header.d=none; nxp.com; dmarc=fail action=none header.from=nxp.com; nxp.com; dkim=none (message not signed) header.d=none; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Received: from az84smr01.freescale.net (192.88.158.2) by BN1BFFO11FD046.mail.protection.outlook.com (10.58.145.1) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.803.8 via Frontend Transport; Wed, 18 Jan 2017 17:54:08 +0000 Received: from r49496.am.freescale.net (r49496.am.freescale.net [10.29.244.18]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id v0IHs3DG005932; Wed, 18 Jan 2017 10:54:06 -0700 From: Fabio Estevam To: CC: , , , , "Fabio Estevam" Subject: [PATCH 2/2] clk: imx7d: Add the IPG root clock Date: Wed, 18 Jan 2017 15:53:57 -0200 Message-ID: <1484762037-10737-2-git-send-email-fabio.estevam@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484762037-10737-1-git-send-email-fabio.estevam@nxp.com> References: <1484762037-10737-1-git-send-email-fabio.estevam@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131292356486648083; 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Signed-off-by: Fabio Estevam --- drivers/clk/imx/clk-imx7d.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c index ae1d31b..1705f44 100644 --- a/drivers/clk/imx/clk-imx7d.c +++ b/drivers/clk/imx/clk-imx7d.c @@ -788,7 +788,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) clks[IMX7D_WRCLK_ROOT_DIV] = imx_clk_divider2("wrclk_post_div", "wrclk_pre_div", base + 0xbd00, 0, 6); clks[IMX7D_CLKO1_ROOT_DIV] = imx_clk_divider2("clko1_post_div", "clko1_pre_div", base + 0xbd80, 0, 6); clks[IMX7D_CLKO2_ROOT_DIV] = imx_clk_divider2("clko2_post_div", "clko2_pre_div", base + 0xbe00, 0, 6); - + clks[IMX7D_IPG_ROOT_CLK] = imx_clk_divider2("ipg_root_clk", "ahb_root_clk", base + 0x9080, 0, 2); clks[IMX7D_ARM_A7_ROOT_CLK] = imx_clk_gate4("arm_a7_root_clk", "arm_a7_div", base + 0x4000, 0); clks[IMX7D_ARM_M4_ROOT_CLK] = imx_clk_gate4("arm_m4_root_clk", "arm_m4_div", base + 0x4010, 0); clks[IMX7D_ARM_M0_ROOT_CLK] = imx_clk_gate4("arm_m0_root_clk", "arm_m0_div", base + 0x4020, 0);