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Fri, 27 Jan 2017 11:09:10 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20170127110910eucas1p257e5cb0582f58f98ff1f2c1b502f8037~dnFcpoQX40375603756eucas1p2A for ; Fri, 27 Jan 2017 11:09:10 +0000 (GMT) X-AuditID: cbfec7f1-f793f6d000007796-a9-588b2a567173 Received: from eusync1.samsung.com ( [203.254.199.211]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 46.43.10233.35A2B885; Fri, 27 Jan 2017 11:09:07 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OKF001FRQZ1L520@eusync1.samsung.com> for linux-clk@vger.kernel.org; Fri, 27 Jan 2017 11:09:09 +0000 (GMT) From: Marek Szyprowski To: linux-clk@vger.kernel.org Subject: [PATCH v2 RESEND 1/3] clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks Date: Fri, 27 Jan 2017 12:09:00 +0100 Message-id: <1485515341-29911-2-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1485515341-29911-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupmkeLIzCtJLcpLzFFi42LZduznOd0wre4Ig+NndS0+9txjdWD0+LxJ LoAxissmJTUnsyy1SN8ugSvj9dvPrAVrBSpOn7jI2sA4la+LkZNDQsBE4uezxWwQtpjEhXvr gWwuDiGBpYwS9yduZoVwJjNJ3PzSywbT0bu3mR0isYxRon/BVUYIZx6TxIX3N5lBqtgEDCW6 3naBdYgIyErcOvYTzBYWSJCY1N4DZrMIqErc6Z3NBGLzCnhILFl2jx1ig5zEyWOTWUFsTgFP ibeLJ4FtkxCYwSbx6880oAUcQI6sxKYDzBD1LhIT2jZC2cISr45vgZojI3F5cjcLhN3PKNHU qg1hz2CUOPeWF8K2ljh8/CLYLmYBPolJ26ZDjeeV6GgTgijxkHg18xXUeEeJC8euM0H8O4dR 4vvJ3SwTGKUXMDKsYhRJLS3OTU8tNtIrTswtLs1L10vOz93ECIyi0/+Of9zB+P6E1SFGAQ5G JR7eCPmuCCHWxLLiytxDjBIczEoivLpi3RFCvCmJlVWpRfnxRaU5qcWHGKU5WJTEefcsuBIu JJCeWJKanZpakFoEk2Xi4JRqYOT/dLE5csqde89u//ufc99w//Pmr0zV00LVgjl1guZu6o3g Ke8I2jzTSeTpyRW/9/35f6R09eRLv3LDZ2Q+6WozjTp1rYL/CrfbnCjujSYcZ6fX8zu5L4h7 5ajhGXTy7gtOZykr9aKtTywl5K/wHMnbO8f09ypJX9UHdlsTRWcpv553iqfvq4QSS3FGoqEW c1FxIgD+d7H+ngIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrNLMWRmVeSWpSXmKPExsVy+t/xy7rBWt0RBhPfm1p87LnH6sDo8XmT XABjlJtNRmpiSmqRQmpecn5KZl66rVJoiJuuhZJCXmJuqq1ShK5vSJCSQlliTimQZ2SABhyc A9yDlfTtEtwyXr/9zFqwVqDi9ImLrA2MU/m6GDk5JARMJHr3NrND2GISF+6tZ+ti5OIQEljC KHFo6zN2CGcBk0T3ggNMIFVsAoYSXW+72EBsEQFZiVvHfoLZwgIJEpPae8BsFgFViTu9s8Hq eQU8JJYsuwe1QU7i5LHJrCA2p4CnxNvFk8DiQkA1qy6/YJ3AyLOAkWEVo0hqaXFuem6xkV5x Ym5xaV66XnJ+7iZGYEBtO/Zzyw7GrnfBhxgFOBiVeHgj5LsihFgTy4orcw8xSnAwK4nw6op1 RwjxpiRWVqUW5ccXleakFh9iNAU6aiKzlGhyPjDY80riDU0MzS0NjYwtLMyNjJTEead+uBIu JJCeWJKanZpakFoE08fEwSnVwKheOu/opeLjN91tJzYedr99XoavJKZarC1i1uG5vuUKag0X D02fanhX7XfZbMaO8qXHF6r/Ef1lYPQlyyln/ceGZT0SCby+05ZGbX51ottsVs3km+Uiu5av vmBdK2/JGfotYlu+y05Tpoc3/8rplry73Py86m3MioczXs3rM3HtdXIXnvbwZ6QSS3FGoqEW c1FxIgCJDF2ZPgIAAA== X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170127110910eucas1p257e5cb0582f58f98ff1f2c1b502f8037 X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRs=?= =?UTF-8?B?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRtT?= =?UTF-8?B?YW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170127110910eucas1p257e5cb0582f58f98ff1f2c1b502f8037 X-RootMTR: 20170127110910eucas1p257e5cb0582f58f98ff1f2c1b502f8037 References: <1485515341-29911-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add missing identifiers for phyclk_mipidphy0_bitclkdiv8_phy and phyclk_mipidphy0_rxclkesc0_phy clocks. Access to those clocks is needed to setup initial clock configuration for display subsystem in device tree in order to avoid dependency on the configuration left by the bootloader. Signed-off-by: Marek Szyprowski Acked-by: Krzysztof Kozlowski Acked-by: Chanwoo Choi --- drivers/clk/samsung/clk-exynos5433.c | 6 ++++-- include/dt-bindings/clock/exynos5433.h | 5 ++++- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 8fd7f6e88e3c..6ee91ae875c3 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -2559,8 +2559,10 @@ static void __init exynos5433_cmu_g2d_init(struct device_node *np) FRATE(0, "phyclk_mipidphy1_bitclkdiv8_phy", NULL, 0, 188000000), FRATE(0, "phyclk_mipidphy1_rxclkesc0_phy", NULL, 0, 100000000), /* PHY clocks from MIPI_DPHY0 */ - FRATE(0, "phyclk_mipidphy0_bitclkdiv8_phy", NULL, 0, 188000000), - FRATE(0, "phyclk_mipidphy0_rxclkesc0_phy", NULL, 0, 100000000), + FRATE(CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY, "phyclk_mipidphy0_bitclkdiv8_phy", + NULL, 0, 188000000), + FRATE(CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY, "phyclk_mipidphy0_rxclkesc0_phy", + NULL, 0, 100000000), /* PHY clocks from HDMI_PHY */ FRATE(CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY, "phyclk_hdmiphy_tmds_clko_phy", NULL, 0, 300000000), diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h index 4fa6bb2136e3..be39d23e6a32 100644 --- a/include/dt-bindings/clock/exynos5433.h +++ b/include/dt-bindings/clock/exynos5433.h @@ -771,7 +771,10 @@ #define CLK_PCLK_DECON 113 -#define DISP_NR_CLK 114 +#define CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY 114 +#define CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY 115 + +#define DISP_NR_CLK 116 /* CMU_AUD */ #define CLK_MOUT_AUD_PLL_USER 1