From patchwork Fri Mar 17 15:02:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 9630919 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 016F7602D6 for ; Fri, 17 Mar 2017 15:11:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 00E0E286A2 for ; Fri, 17 Mar 2017 15:11:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E9013286B4; Fri, 17 Mar 2017 15:11:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9455E286A2 for ; Fri, 17 Mar 2017 15:11:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751072AbdCQPLF (ORCPT ); Fri, 17 Mar 2017 11:11:05 -0400 Received: from mail-pg0-f42.google.com ([74.125.83.42]:35152 "EHLO mail-pg0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751107AbdCQPLE (ORCPT ); Fri, 17 Mar 2017 11:11:04 -0400 Received: by mail-pg0-f42.google.com with SMTP id b129so43121211pgc.2 for ; Fri, 17 Mar 2017 08:10:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=nglOBlz7W4/TmQLwDdWEou+rI7p/vSj3Pq/bxWPR4LM=; b=dkYrqiWiNOqH4knMm6z0xULUyGfIAeeA9O79ajZnPCADaCOYzG6rOObMZfSTFzGE9w DtE4Oa9RiDM5oCr6WnGJb2lqkZ/tcvQspmeShmwB+CZDNIVq0CDmcD1myKMVhjNgIvmR jFM4qkcuVogKvf9d/MKxEyz8D82EmySr27AwE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=nglOBlz7W4/TmQLwDdWEou+rI7p/vSj3Pq/bxWPR4LM=; b=V98G9T4/SLNZFIjVZgflxobXpY13Q7ZksUdc2/NsIh5oOctMbE1kZfNXMbzR5BwCiw yuQ/Xi3Zjg/fSCx1983f64bZwxXo6D4lP1SkSPMG6c42uIeJr/fBzcYg+ESF2URy5xx1 ++A9zklVfLgCnRj5DXD6RAvSJvWsGTQt51YL22jY2WycMRrfDbiG1Q9PLHjIjk7q6gke odqub6q0gRkFciO9QN7QVlOxk59ZT8aLHZwKwdCpDM5k3RZgYKniHEpaShsFb+o2vGgu N66RbAsMEtp9y4FJHo87unTPzDyerwU9YcnnKA9S4yD7ALy230+uMUDR9BbGsT9QyjhK QaIg== X-Gm-Message-State: AFeK/H2eFm9gYZI4Ld8qGfGrENX5qbZ+J9ezePRmLXyQBIEGUsDvXWMEEXscqWwGPXIrhBFS X-Received: by 10.99.113.82 with SMTP id b18mr16438164pgn.180.1489763080093; Fri, 17 Mar 2017 08:04:40 -0700 (PDT) Received: from localhost.localdomain ([103.230.219.215]) by smtp.gmail.com with ESMTPSA id f125sm17482582pfc.4.2017.03.17.08.04.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 17 Mar 2017 08:04:38 -0700 (PDT) From: Leo Yan To: Rob Herring , Mark Rutland , Wei Xu , Catalin Marinas , Will Deacon , Andy Gross , David Brown , Michael Turquette , Stephen Boyd , Mathieu Poirier , Leo Yan , Guodong Xu , John Stultz , Greg Kroah-Hartman , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, mike.leach@linaro.org, Suzuki.Poulose@arm.com, sudeep.holla@arm.com Subject: [PATCH v4 5/7] clk: hi6220: add debug APB clock Date: Fri, 17 Mar 2017 23:02:21 +0800 Message-Id: <1489762943-25849-6-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1489762943-25849-1-git-send-email-leo.yan@linaro.org> References: <1489762943-25849-1-git-send-email-leo.yan@linaro.org> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The debug APB clock is absent in hi6220 driver, so this patch is to add support for it. Signed-off-by: Leo Yan --- drivers/clk/hisilicon/clk-hi6220.c | 1 + include/dt-bindings/clock/hi6220-clock.h | 5 ++++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/clk/hisilicon/clk-hi6220.c b/drivers/clk/hisilicon/clk-hi6220.c index c0e8e1f..2ae151c 100644 --- a/drivers/clk/hisilicon/clk-hi6220.c +++ b/drivers/clk/hisilicon/clk-hi6220.c @@ -134,6 +134,7 @@ static struct hisi_gate_clock hi6220_separated_gate_clks_sys[] __initdata = { { HI6220_UART4_PCLK, "uart4_pclk", "uart4_src", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x230, 8, 0, }, { HI6220_SPI_CLK, "spi_clk", "clk_150m", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x230, 9, 0, }, { HI6220_TSENSOR_CLK, "tsensor_clk", "clk_bus", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x230, 12, 0, }, + { HI6220_DAPB_CLK, "dapb_clk", "cs_dapb", CLK_SET_RATE_PARENT|CLK_IS_CRITICAL, 0x230, 18, 0, }, { HI6220_MMU_CLK, "mmu_clk", "ddrc_axi1", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x240, 11, 0, }, { HI6220_HIFI_SEL, "hifi_sel", "hifi_src", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 0, 0, }, { HI6220_MMC0_SYSPLL, "mmc0_syspll", "syspll", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 1, 0, }, diff --git a/include/dt-bindings/clock/hi6220-clock.h b/include/dt-bindings/clock/hi6220-clock.h index 6b03c84..b8ba665 100644 --- a/include/dt-bindings/clock/hi6220-clock.h +++ b/include/dt-bindings/clock/hi6220-clock.h @@ -124,7 +124,10 @@ #define HI6220_CS_DAPB 57 #define HI6220_CS_ATB_DIV 58 -#define HI6220_SYS_NR_CLKS 59 +/* gate clock */ +#define HI6220_DAPB_CLK 59 + +#define HI6220_SYS_NR_CLKS 60 /* clk in Hi6220 media controller */ /* gate clocks */