From patchwork Wed Apr 5 11:46:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Firago X-Patchwork-Id: 9663815 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8BA64602B8 for ; Wed, 5 Apr 2017 11:47:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 71F5622638 for ; Wed, 5 Apr 2017 11:47:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6691B27D0E; Wed, 5 Apr 2017 11:47:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D5DEB22638 for ; Wed, 5 Apr 2017 11:47:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933727AbdDELrN (ORCPT ); Wed, 5 Apr 2017 07:47:13 -0400 Received: from relay1.mentorg.com ([192.94.38.131]:58716 "EHLO relay1.mentorg.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933652AbdDELrJ (ORCPT ); Wed, 5 Apr 2017 07:47:09 -0400 Received: from nat-ies.mentorg.com ([192.94.31.2] helo=SVR-IES-FEM-01.mgc.mentorg.com) by relay1.mentorg.com with esmtp id 1cvjP0-0002bb-4T from Alexey_Firago@mentor.com ; Wed, 05 Apr 2017 04:47:06 -0700 Received: from grobik.rup.mentorg.com (137.202.0.76) by SVR-IES-FEM-01.mgc.mentorg.com (137.202.0.104) with Microsoft SMTP Server id 14.3.224.2; Wed, 5 Apr 2017 12:47:04 +0100 From: Alexey Firago To: , , , , , , CC: Alexey Firago Subject: [PATCH v2 3/3] clk: vc5: Add support for IDT VersaClock 5P49V5935 Date: Wed, 5 Apr 2017 14:46:59 +0300 Message-ID: <1491392819-698-4-git-send-email-alexey_firago@mentor.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491392819-698-1-git-send-email-alexey_firago@mentor.com> References: <1491392819-698-1-git-send-email-alexey_firago@mentor.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Update IDT VersaClock 5 driver to support 5P49V5935. This chip has two clock inputs (internal XTAL or external CLKIN), four fractional dividers (FODs) and five clock outputs (four universal clock outputs and one reference clock output at OUT0_SELB_I2C). Current driver supports up to 2 FODs and up to 3 clock outputs. This patch sets max number of supported FODs to 4 and max number of supported clock outputs to 5. Signed-off-by: Alexey Firago Reviewed-by: Geert Uytterhoeven --- drivers/clk/clk-versaclock5.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/clk/clk-versaclock5.c b/drivers/clk/clk-versaclock5.c index 7d31390..4c268e3 100644 --- a/drivers/clk/clk-versaclock5.c +++ b/drivers/clk/clk-versaclock5.c @@ -114,10 +114,10 @@ #define VC5_MUX_IN_CLKIN BIT(1) /* Maximum number of clk_out supported by this driver */ -#define VC5_MAX_CLK_OUT_NUM 3 +#define VC5_MAX_CLK_OUT_NUM 5 /* Maximum number of FODs supported by this driver */ -#define VC5_MAX_FOD_NUM 2 +#define VC5_MAX_FOD_NUM 4 /* flags to describe chip features */ /* chip has built-in oscilator */ @@ -127,6 +127,7 @@ enum vc5_model { IDT_VC5_5P49V5923, IDT_VC5_5P49V5933, + IDT_VC5_5P49V5935, }; /* Structure to describe features of a particular VC5 model */ @@ -594,6 +595,7 @@ static int vc5_map_index_to_output(const enum vc5_model model, case IDT_VC5_5P49V5933: return (n == 0) ? 0 : 3; case IDT_VC5_5P49V5923: + case IDT_VC5_5P49V5935: default: return n; } @@ -798,9 +800,17 @@ static const struct vc5_chip_info idt_5p49v5933_info = { .flags = VC5_HAS_INTERNAL_XTAL, }; +static const struct vc5_chip_info idt_5p49v5935_info = { + .model = IDT_VC5_5P49V5935, + .clk_fod_cnt = 4, + .clk_out_cnt = 5, + .flags = VC5_HAS_INTERNAL_XTAL, +}; + static const struct i2c_device_id vc5_id[] = { { "5p49v5923", .driver_data = IDT_VC5_5P49V5923 }, { "5p49v5933", .driver_data = IDT_VC5_5P49V5933 }, + { "5p49v5935", .driver_data = IDT_VC5_5P49V5935 }, { } }; MODULE_DEVICE_TABLE(i2c, vc5_id); @@ -808,6 +818,7 @@ MODULE_DEVICE_TABLE(i2c, vc5_id); static const struct of_device_id clk_vc5_of_match[] = { { .compatible = "idt,5p49v5923", .data = &idt_5p49v5923_info }, { .compatible = "idt,5p49v5933", .data = &idt_5p49v5933_info }, + { .compatible = "idt,5p49v5935", .data = &idt_5p49v5935_info }, { }, }; MODULE_DEVICE_TABLE(of, clk_vc5_of_match);