| Message ID | 1494071686-19098-5-git-send-email-anup.patel@broadcom.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
Le 05/06/17 à 04:54, Anup Patel a écrit : > The Broadcom Stingray SoC is a new member in Broadcom iProc > SoC family. > > This patch adds initial DTS files for Broadcom Stingray SoC > and two of its reference boards (bcm958742k and bcm958742t). > > We have lot of reference boards and large number of devices > in Broadcom Stingray SoC so eventually we will have quite > a few DTS files for Stingray. To tackle, we have added a > separate directory for Stingray DTS files. > > Signed-off-by: Anup Patel <anup.patel@broadcom.com> > Signed-off-by: Scott Branden <scott.branden@broadcom.com> > Reviewed-by: Ray Jui <rjui@broadcom.com> > --- > + > + scr { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0 0 0xffffffff>; Sorry for missing that during the internal review, the ranges property here should include the 6300_0000 offset such that everything else under the "scr" node is relative to that base address. This makes it a lot easier to understand the different physical addresses involved and the bus topology.
One update below needed dealing with memreserve On 17-05-06 04:54 AM, Anup Patel wrote: > The Broadcom Stingray SoC is a new member in Broadcom iProc > SoC family. > > This patch adds initial DTS files for Broadcom Stingray SoC > and two of its reference boards (bcm958742k and bcm958742t). > > We have lot of reference boards and large number of devices > in Broadcom Stingray SoC so eventually we will have quite > a few DTS files for Stingray. To tackle, we have added a > separate directory for Stingray DTS files. > > Signed-off-by: Anup Patel <anup.patel@broadcom.com> > Signed-off-by: Scott Branden <scott.branden@broadcom.com> > Reviewed-by: Ray Jui <rjui@broadcom.com> > --- > arch/arm64/boot/dts/broadcom/Makefile | 1 + > arch/arm64/boot/dts/broadcom/stingray/Makefile | 6 + > .../boot/dts/broadcom/stingray/bcm958742-base.dtsi | 64 +++++ > .../boot/dts/broadcom/stingray/bcm958742k.dts | 48 ++++ > .../boot/dts/broadcom/stingray/bcm958742t.dts | 40 +++ > .../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 307 +++++++++++++++++++++ > 6 files changed, 466 insertions(+) > create mode 100644 arch/arm64/boot/dts/broadcom/stingray/Makefile > create mode 100644 arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi > create mode 100644 arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts > create mode 100644 arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts > create mode 100644 arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi > > diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile > index f1caece..a7c3208 100644 > --- a/arch/arm64/boot/dts/broadcom/Makefile > +++ b/arch/arm64/boot/dts/broadcom/Makefile > @@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb > dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb ns2-xmc.dtb > dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb > > +dts-dirs := stingray > always := $(dtb-y) > subdir-y := $(dts-dirs) > clean-files := *.dtb > diff --git a/arch/arm64/boot/dts/broadcom/stingray/Makefile b/arch/arm64/boot/dts/broadcom/stingray/Makefile > new file mode 100644 > index 0000000..f70028e > --- /dev/null > +++ b/arch/arm64/boot/dts/broadcom/stingray/Makefile > @@ -0,0 +1,6 @@ > +dtb-$(CONFIG_ARCH_BCM_IPROC) += bcm958742k.dtb > +dtb-$(CONFIG_ARCH_BCM_IPROC) += bcm958742t.dtb > + > +always := $(dtb-y) > +subdir-y := $(dts-dirs) > +clean-files := *.dtb > diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi > new file mode 100644 > index 0000000..e3a2a36 > --- /dev/null > +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi > @@ -0,0 +1,64 @@ > +/* > + * BSD LICENSE > + * > + * Copyright(c) 2016-2017 Broadcom. All rights reserved. > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions > + * are met: > + * > + * * Redistributions of source code must retain the above copyright > + * notice, this list of conditions and the following disclaimer. > + * * Redistributions in binary form must reproduce the above copyright > + * notice, this list of conditions and the following disclaimer in > + * the documentation and/or other materials provided with the > + * distribution. > + * * Neither the name of Broadcom nor the names of its > + * contributors may be used to endorse or promote products derived > + * from this software without specific prior written permission. > + * > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS > + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT > + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR > + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT > + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, > + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT > + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, > + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY > + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT > + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE > + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > + */ > + > +/* > + * Reserve portion of RAM used by secured firmware > + * running in background. > + */ This memreserve comment was changed from the internal version of the dtsi file. Comment is now misleading as I don't think this memreserve is used at all. EFI Loader passes in the memory configuration. Comment needs to be updated to indicate this is not used by standard bootloader. Or, simply remove the memreserve here. > +/memreserve/ 0x8f000000 0x00100000; > + > +#include "stingray.dtsi" > + > +/ { > + chosen { /* Default kernel args */ > + bootargs = "root=/dev/ram rw rootwait \ > + earlycon=uart8250,mmio32,0x68a10000 \ > + pci=pcie_bus_safe cma=64M"; > + linux,stdout-path = "serial0:115200n8"; > + }; > + > + aliases { > + serial0 = &uart1; > + serial1 = &uart0; > + serial2 = &uart2; > + serial3 = &uart3; > + }; > +}; > + > +&memory { /* Default DRAM banks */ > + reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */ > + <0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */ > +}; > + > +&uart1 { > + status = "okay"; > +}; > diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts b/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts > new file mode 100644 > index 0000000..c309cda > --- /dev/null > +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts > @@ -0,0 +1,48 @@ > +/* > + * BSD LICENSE > + * > + * Copyright(c) 2016-2017 Broadcom. All rights reserved. > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions > + * are met: > + * > + * * Redistributions of source code must retain the above copyright > + * notice, this list of conditions and the following disclaimer. > + * * Redistributions in binary form must reproduce the above copyright > + * notice, this list of conditions and the following disclaimer in > + * the documentation and/or other materials provided with the > + * distribution. > + * * Neither the name of Broadcom nor the names of its > + * contributors may be used to endorse or promote products derived > + * from this software without specific prior written permission. > + * > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS > + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT > + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR > + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT > + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, > + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT > + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, > + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY > + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT > + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE > + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > + */ > + > +/dts-v1/; > + > +#include "bcm958742-base.dtsi" > + > +/ { > + compatible = "brcm,bcm958742k", "brcm,stingray"; > + model = "Stingray Combo SVK (BCM958742K)"; > +}; > + > +&uart2 { > + status = "okay"; > +}; > + > +&uart3 { > + status = "okay"; > +}; > diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts b/arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts > new file mode 100644 > index 0000000..6ebe399 > --- /dev/null > +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts > @@ -0,0 +1,40 @@ > +/* > + * BSD LICENSE > + * > + * Copyright(c) 2017 Broadcom. All rights reserved. > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions > + * are met: > + * > + * * Redistributions of source code must retain the above copyright > + * notice, this list of conditions and the following disclaimer. > + * * Redistributions in binary form must reproduce the above copyright > + * notice, this list of conditions and the following disclaimer in > + * the documentation and/or other materials provided with the > + * distribution. > + * * Neither the name of Broadcom nor the names of its > + * contributors may be used to endorse or promote products derived > + * from this software without specific prior written permission. > + * > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS > + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT > + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR > + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT > + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, > + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT > + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, > + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY > + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT > + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE > + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > + */ > + > +/dts-v1/; > + > +#include "bcm958742-base.dtsi" > + > +/ { > + compatible = "brcm,bcm958742t", "brcm,stingray"; > + model = "Stingray SST100 (BCM958742T)"; > +}; > diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi > new file mode 100644 > index 0000000..f08b37e > --- /dev/null > +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi > @@ -0,0 +1,307 @@ > +/* > + * BSD LICENSE > + * > + * Copyright(c) 2015-2017 Broadcom. All rights reserved. > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions > + * are met: > + * > + * * Redistributions of source code must retain the above copyright > + * notice, this list of conditions and the following disclaimer. > + * * Redistributions in binary form must reproduce the above copyright > + * notice, this list of conditions and the following disclaimer in > + * the documentation and/or other materials provided with the > + * distribution. > + * * Neither the name of Broadcom nor the names of its > + * contributors may be used to endorse or promote products derived > + * from this software without specific prior written permission. > + * > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS > + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT > + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR > + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT > + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, > + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT > + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, > + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY > + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT > + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE > + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > + */ > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + compatible = "brcm,stingray"; > + interrupt-parent = <&gic>; > + #address-cells = <2>; > + #size-cells = <2>; > + > + cpus { > + #address-cells = <2>; > + #size-cells = <0>; > + > + cpu@000 { > + device_type = "cpu"; > + compatible = "arm,cortex-a72", "arm,armv8"; > + reg = <0x0 0x0>; > + enable-method = "psci"; > + next-level-cache = <&CLUSTER0_L2>; > + }; > + > + cpu@001 { > + device_type = "cpu"; > + compatible = "arm,cortex-a72", "arm,armv8"; > + reg = <0x0 0x1>; > + enable-method = "psci"; > + next-level-cache = <&CLUSTER0_L2>; > + }; > + > + cpu@100 { > + device_type = "cpu"; > + compatible = "arm,cortex-a72", "arm,armv8"; > + reg = <0x0 0x100>; > + enable-method = "psci"; > + next-level-cache = <&CLUSTER1_L2>; > + }; > + > + cpu@101 { > + device_type = "cpu"; > + compatible = "arm,cortex-a72", "arm,armv8"; > + reg = <0x0 0x101>; > + enable-method = "psci"; > + next-level-cache = <&CLUSTER1_L2>; > + }; > + > + cpu@200 { > + device_type = "cpu"; > + compatible = "arm,cortex-a72", "arm,armv8"; > + reg = <0x0 0x200>; > + enable-method = "psci"; > + next-level-cache = <&CLUSTER2_L2>; > + }; > + > + cpu@201 { > + device_type = "cpu"; > + compatible = "arm,cortex-a72", "arm,armv8"; > + reg = <0x0 0x201>; > + enable-method = "psci"; > + next-level-cache = <&CLUSTER2_L2>; > + }; > + > + cpu@300 { > + device_type = "cpu"; > + compatible = "arm,cortex-a72", "arm,armv8"; > + reg = <0x0 0x300>; > + enable-method = "psci"; > + next-level-cache = <&CLUSTER3_L2>; > + }; > + > + cpu@301 { > + device_type = "cpu"; > + compatible = "arm,cortex-a72", "arm,armv8"; > + reg = <0x0 0x301>; > + enable-method = "psci"; > + next-level-cache = <&CLUSTER3_L2>; > + }; > + > + CLUSTER0_L2: l2-cache@000 { > + compatible = "cache"; > + }; > + > + CLUSTER1_L2: l2-cache@100 { > + compatible = "cache"; > + }; > + > + CLUSTER2_L2: l2-cache@200 { > + compatible = "cache"; > + }; > + > + CLUSTER3_L2: l2-cache@300 { > + compatible = "cache"; > + }; > + }; > + > + memory: memory@80000000 { > + device_type = "memory"; > + reg = <0x00000000 0x80000000 0 0x40000000>; > + }; > + > + psci { > + compatible = "arm,psci-0.2"; > + method = "smc"; > + }; > + > + pmu { > + compatible = "arm,armv8-pmuv3"; > + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | > + IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | > + IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | > + IRQ_TYPE_LEVEL_LOW)>, > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | > + IRQ_TYPE_LEVEL_LOW)>; > + }; > + > + scr { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0 0 0xffffffff>; > + > + gic: interrupt-controller@63c00000 { > + compatible = "arm,gic-v3"; > + #interrupt-cells = <3>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + interrupt-controller; > + reg = <0x63c00000 0x010000>, /* GICD */ > + <0x63e00000 0x600000>; /* GICR */ > + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) | > + IRQ_TYPE_LEVEL_HIGH)>; > + > + gic_its: gic-its@63c20000 { > + compatible = "arm,gic-v3-its"; > + msi-controller; > + #msi-cells = <1>; > + reg = <0x63c20000 0x10000>; > + }; > + }; > + > + smmu: mmu@64000000 { > + compatible = "arm,mmu-500"; > + reg = <0x64000000 0x80000>; > + #global-interrupts = <1>; > + interrupts = <GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 711 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 712 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 713 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 715 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 717 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 718 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 719 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 720 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 721 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 722 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 723 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 724 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 725 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 726 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 727 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 728 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 729 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 730 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 731 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 732 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 733 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 734 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 735 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 736 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 737 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 738 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 739 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 740 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 741 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 742 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 743 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 744 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 745 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 746 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 747 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 748 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 749 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 750 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 751 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 752 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 753 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 754 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 755 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 756 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 757 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 758 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 759 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 760 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 761 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 762 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 763 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 767 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 768 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 769 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 771 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>; > + #iommu-cells = <2>; > + }; > + }; > + > + hsls { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0 0 0xffffffff>; > + > + uart0: uart@68a00000 { > + device_type = "serial"; > + compatible = "snps,dw-apb-uart"; > + reg = <0x68a00000 0x1000>; > + reg-shift = <2>; > + clock-frequency = <25000000>; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; > + status = "disabled"; > + }; > + > + uart1: uart@68a10000 { > + device_type = "serial"; > + compatible = "snps,dw-apb-uart"; > + reg = <0x68a10000 0x1000>; > + reg-shift = <2>; > + clock-frequency = <25000000>; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > + status = "disabled"; > + }; > + > + uart2: uart@68a20000 { > + device_type = "serial"; > + compatible = "snps,dw-apb-uart"; > + reg = <0x68a20000 0x1000>; > + reg-shift = <2>; > + clock-frequency = <25000000>; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; > + status = "disabled"; > + }; > + > + uart3: uart@68a30000 { > + device_type = "serial"; > + compatible = "snps,dw-apb-uart"; > + reg = <0x68a30000 0x1000>; > + reg-shift = <2>; > + clock-frequency = <25000000>; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; > + status = "disabled"; > + }; > + > + hwrng: hwrng@68b20000 { > + compatible = "brcm,iproc-rng200"; > + reg = <0x68b20000 0x28>; > + }; > + }; > +}; > -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, May 8, 2017 at 5:00 AM, Florian Fainelli <f.fainelli@gmail.com> wrote: > Le 05/06/17 à 04:54, Anup Patel a écrit : >> The Broadcom Stingray SoC is a new member in Broadcom iProc >> SoC family. >> >> This patch adds initial DTS files for Broadcom Stingray SoC >> and two of its reference boards (bcm958742k and bcm958742t). >> >> We have lot of reference boards and large number of devices >> in Broadcom Stingray SoC so eventually we will have quite >> a few DTS files for Stingray. To tackle, we have added a >> separate directory for Stingray DTS files. >> >> Signed-off-by: Anup Patel <anup.patel@broadcom.com> >> Signed-off-by: Scott Branden <scott.branden@broadcom.com> >> Reviewed-by: Ray Jui <rjui@broadcom.com> >> --- > >> + >> + scr { >> + compatible = "simple-bus"; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges = <0 0 0 0xffffffff>; > > Sorry for missing that during the internal review, the ranges property > here should include the 6300_0000 offset such that everything else under > the "scr" node is relative to that base address. This makes it a lot > easier to understand the different physical addresses involved and the > bus topology. Sure, I will do this. Regards, Anup -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, May 9, 2017 at 2:02 AM, Scott Branden <scott.branden@broadcom.com> wrote: > One update below needed dealing with memreserve > > > On 17-05-06 04:54 AM, Anup Patel wrote: >> >> The Broadcom Stingray SoC is a new member in Broadcom iProc >> SoC family. >> >> This patch adds initial DTS files for Broadcom Stingray SoC >> and two of its reference boards (bcm958742k and bcm958742t). >> >> We have lot of reference boards and large number of devices >> in Broadcom Stingray SoC so eventually we will have quite >> a few DTS files for Stingray. To tackle, we have added a >> separate directory for Stingray DTS files. >> >> Signed-off-by: Anup Patel <anup.patel@broadcom.com> >> Signed-off-by: Scott Branden <scott.branden@broadcom.com> >> Reviewed-by: Ray Jui <rjui@broadcom.com> >> --- >> arch/arm64/boot/dts/broadcom/Makefile | 1 + >> arch/arm64/boot/dts/broadcom/stingray/Makefile | 6 + >> .../boot/dts/broadcom/stingray/bcm958742-base.dtsi | 64 +++++ >> .../boot/dts/broadcom/stingray/bcm958742k.dts | 48 ++++ >> .../boot/dts/broadcom/stingray/bcm958742t.dts | 40 +++ >> .../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 307 >> +++++++++++++++++++++ >> 6 files changed, 466 insertions(+) >> create mode 100644 arch/arm64/boot/dts/broadcom/stingray/Makefile >> create mode 100644 >> arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi >> create mode 100644 arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts >> create mode 100644 arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts >> create mode 100644 arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi >> >> diff --git a/arch/arm64/boot/dts/broadcom/Makefile >> b/arch/arm64/boot/dts/broadcom/Makefile >> index f1caece..a7c3208 100644 >> --- a/arch/arm64/boot/dts/broadcom/Makefile >> +++ b/arch/arm64/boot/dts/broadcom/Makefile >> @@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb >> dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb ns2-xmc.dtb >> dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb >> >> +dts-dirs := stingray >> always := $(dtb-y) >> subdir-y := $(dts-dirs) >> clean-files := *.dtb >> diff --git a/arch/arm64/boot/dts/broadcom/stingray/Makefile >> b/arch/arm64/boot/dts/broadcom/stingray/Makefile >> new file mode 100644 >> index 0000000..f70028e >> --- /dev/null >> +++ b/arch/arm64/boot/dts/broadcom/stingray/Makefile >> @@ -0,0 +1,6 @@ >> +dtb-$(CONFIG_ARCH_BCM_IPROC) += bcm958742k.dtb >> +dtb-$(CONFIG_ARCH_BCM_IPROC) += bcm958742t.dtb >> + >> +always := $(dtb-y) >> +subdir-y := $(dts-dirs) >> +clean-files := *.dtb >> diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi >> b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi >> new file mode 100644 >> index 0000000..e3a2a36 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi >> @@ -0,0 +1,64 @@ >> +/* >> + * BSD LICENSE >> + * >> + * Copyright(c) 2016-2017 Broadcom. All rights reserved. >> + * >> + * Redistribution and use in source and binary forms, with or without >> + * modification, are permitted provided that the following conditions >> + * are met: >> + * >> + * * Redistributions of source code must retain the above copyright >> + * notice, this list of conditions and the following disclaimer. >> + * * Redistributions in binary form must reproduce the above copyright >> + * notice, this list of conditions and the following disclaimer in >> + * the documentation and/or other materials provided with the >> + * distribution. >> + * * Neither the name of Broadcom nor the names of its >> + * contributors may be used to endorse or promote products derived >> + * from this software without specific prior written permission. >> + * >> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS >> + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT >> + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR >> + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT >> + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, >> + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT >> + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, >> + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY >> + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT >> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE >> + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. >> + */ >> + >> +/* >> + * Reserve portion of RAM used by secured firmware >> + * running in background. >> + */ > > This memreserve comment was changed from the internal version of the dtsi > file. Comment is now misleading as I don't think this memreserve is used at > all. EFI Loader passes in the memory configuration. Comment needs to be > updated to indicate this is not used by standard bootloader. Or, simply > remove the memreserve here. Actually its always better to have memreserve added by bootloader. I will try with latest bootloader and if possible I will remove the memreserve itself. Regards, Anup -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile index f1caece..a7c3208 100644 --- a/arch/arm64/boot/dts/broadcom/Makefile +++ b/arch/arm64/boot/dts/broadcom/Makefile @@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb ns2-xmc.dtb dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb +dts-dirs := stingray always := $(dtb-y) subdir-y := $(dts-dirs) clean-files := *.dtb diff --git a/arch/arm64/boot/dts/broadcom/stingray/Makefile b/arch/arm64/boot/dts/broadcom/stingray/Makefile new file mode 100644 index 0000000..f70028e --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/stingray/Makefile @@ -0,0 +1,6 @@ +dtb-$(CONFIG_ARCH_BCM_IPROC) += bcm958742k.dtb +dtb-$(CONFIG_ARCH_BCM_IPROC) += bcm958742t.dtb + +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi new file mode 100644 index 0000000..e3a2a36 --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi @@ -0,0 +1,64 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2016-2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Reserve portion of RAM used by secured firmware + * running in background. + */ +/memreserve/ 0x8f000000 0x00100000; + +#include "stingray.dtsi" + +/ { + chosen { /* Default kernel args */ + bootargs = "root=/dev/ram rw rootwait \ + earlycon=uart8250,mmio32,0x68a10000 \ + pci=pcie_bus_safe cma=64M"; + linux,stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &uart1; + serial1 = &uart0; + serial2 = &uart2; + serial3 = &uart3; + }; +}; + +&memory { /* Default DRAM banks */ + reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */ + <0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */ +}; + +&uart1 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts b/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts new file mode 100644 index 0000000..c309cda --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts @@ -0,0 +1,48 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2016-2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/dts-v1/; + +#include "bcm958742-base.dtsi" + +/ { + compatible = "brcm,bcm958742k", "brcm,stingray"; + model = "Stingray Combo SVK (BCM958742K)"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts b/arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts new file mode 100644 index 0000000..6ebe399 --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts @@ -0,0 +1,40 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/dts-v1/; + +#include "bcm958742-base.dtsi" + +/ { + compatible = "brcm,bcm958742t", "brcm,stingray"; + model = "Stingray SST100 (BCM958742T)"; +}; diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi new file mode 100644 index 0000000..f08b37e --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi @@ -0,0 +1,307 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2015-2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "brcm,stingray"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu@000 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&CLUSTER0_L2>; + }; + + cpu@001 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&CLUSTER0_L2>; + }; + + cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "psci"; + next-level-cache = <&CLUSTER1_L2>; + }; + + cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x101>; + enable-method = "psci"; + next-level-cache = <&CLUSTER1_L2>; + }; + + cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x200>; + enable-method = "psci"; + next-level-cache = <&CLUSTER2_L2>; + }; + + cpu@201 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x201>; + enable-method = "psci"; + next-level-cache = <&CLUSTER2_L2>; + }; + + cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x300>; + enable-method = "psci"; + next-level-cache = <&CLUSTER3_L2>; + }; + + cpu@301 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x301>; + enable-method = "psci"; + next-level-cache = <&CLUSTER3_L2>; + }; + + CLUSTER0_L2: l2-cache@000 { + compatible = "cache"; + }; + + CLUSTER1_L2: l2-cache@100 { + compatible = "cache"; + }; + + CLUSTER2_L2: l2-cache@200 { + compatible = "cache"; + }; + + CLUSTER3_L2: l2-cache@300 { + compatible = "cache"; + }; + }; + + memory: memory@80000000 { + device_type = "memory"; + reg = <0x00000000 0x80000000 0 0x40000000>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | + IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | + IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | + IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | + IRQ_TYPE_LEVEL_LOW)>; + }; + + scr { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + + gic: interrupt-controller@63c00000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + interrupt-controller; + reg = <0x63c00000 0x010000>, /* GICD */ + <0x63e00000 0x600000>; /* GICR */ + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) | + IRQ_TYPE_LEVEL_HIGH)>; + + gic_its: gic-its@63c20000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <1>; + reg = <0x63c20000 0x10000>; + }; + }; + + smmu: mmu@64000000 { + compatible = "arm,mmu-500"; + reg = <0x64000000 0x80000>; + #global-interrupts = <1>; + interrupts = <GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 711 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 712 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 713 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 715 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 717 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 718 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 719 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 720 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 721 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 722 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 723 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 724 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 725 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 726 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 727 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 728 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 729 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 730 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 731 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 732 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 733 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 734 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 735 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 736 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 737 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 738 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 739 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 740 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 741 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 742 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 743 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 744 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 745 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 746 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 747 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 748 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 749 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 750 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 751 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 752 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 753 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 754 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 755 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 756 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 757 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 758 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 759 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 760 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 761 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 762 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 763 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 767 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 768 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 769 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 771 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>; + #iommu-cells = <2>; + }; + }; + + hsls { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + + uart0: uart@68a00000 { + device_type = "serial"; + compatible = "snps,dw-apb-uart"; + reg = <0x68a00000 0x1000>; + reg-shift = <2>; + clock-frequency = <25000000>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + uart1: uart@68a10000 { + device_type = "serial"; + compatible = "snps,dw-apb-uart"; + reg = <0x68a10000 0x1000>; + reg-shift = <2>; + clock-frequency = <25000000>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + uart2: uart@68a20000 { + device_type = "serial"; + compatible = "snps,dw-apb-uart"; + reg = <0x68a20000 0x1000>; + reg-shift = <2>; + clock-frequency = <25000000>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + uart3: uart@68a30000 { + device_type = "serial"; + compatible = "snps,dw-apb-uart"; + reg = <0x68a30000 0x1000>; + reg-shift = <2>; + clock-frequency = <25000000>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + hwrng: hwrng@68b20000 { + compatible = "brcm,iproc-rng200"; + reg = <0x68b20000 0x28>; + }; + }; +};