From patchwork Sat May 6 11:54:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 9714671 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E212E60387 for ; Sat, 6 May 2017 11:58:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F0EB32863C for ; Sat, 6 May 2017 11:58:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E5B01286B8; Sat, 6 May 2017 11:58:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 890B32863C for ; Sat, 6 May 2017 11:58:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755221AbdEFL5u (ORCPT ); Sat, 6 May 2017 07:57:50 -0400 Received: from mail-wr0-f178.google.com ([209.85.128.178]:36190 "EHLO mail-wr0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754595AbdEFL5O (ORCPT ); Sat, 6 May 2017 07:57:14 -0400 Received: by mail-wr0-f178.google.com with SMTP id l50so15746583wrc.3 for ; Sat, 06 May 2017 04:57:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Iqf11VDOdV3QcBG77gc+08apQp0VQx6kr8L4L66S+3I=; b=LK99W8B0WQ1kk9u6iyw86nFQ1mmbCF2d2i7puXx18RH0NtOxVuO3/I/MOWNKMJyT/u V5Yv6UoT9FuqrepMrWaQ5j7zYFm4mumVa5tVljhFX0giJL5Ej9oAYB79CqGxEMqdXNDk vY3UasDg5RjGUrKent6aVdkdm2++qv9/IHSPY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Iqf11VDOdV3QcBG77gc+08apQp0VQx6kr8L4L66S+3I=; b=TK7dBYUWAAmg1xRFJkfCyUGRxQfvDItx2TAX9jaMVaT7FVIIqSXabd6OeMwnD6bT4o 6TOzdW738t/MvWOSQUT1jpWbVr8q0aER5ItUxv+z+fblDcuDC7vp85H3HxfLPTM2FHiY kyz2tS2NtyvXnqZVZdFxhsUUzflRL7P8/7igvXL90JgppSV9mhA8KlJFxjXCk8sEacjW XcYLzJe/4V86XRBg9s/5viV99VNrkSS+2UL6c62CFQqJ2I/8zSdmEAW435pt5FrX3hYs 1K1V3Ab+r9DShzCK2RWfs5vRdN5AnrBQOSj+wY4+6yrzw0P0+Dm8a9iz2gnLGePqrprW 1RMA== X-Gm-Message-State: AN3rC/6hkuwlXJaXdlvv1VPPXCF/GrbqA4rPY30wNoi1nD/FiV1fwTEK pM2N0LEJHv8WCAqa X-Received: by 10.223.153.195 with SMTP id y61mr35117701wrb.96.1494071827682; Sat, 06 May 2017 04:57:07 -0700 (PDT) Received: from anup-HP-Compaq-8100-Elite-CMT-PC.dhcp.avagotech.net ([192.19.237.250]) by smtp.gmail.com with ESMTPSA id 8sm7775789wrb.55.2017.05.06.04.56.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 06 May 2017 04:57:07 -0700 (PDT) From: Anup Patel To: Rob Herring , Mark Rutland , Michael Turquette Cc: Catalin Marinas , Will Deacon , Ray Jui , Scott Branden , Jon Mason , Florian Fainelli , Oza Pawandeep , Srinath Mannam , Pramod Kumar , Sandeep Tripathy , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, Pramod Kumar Subject: [PATCH 08/11] arm64: dts: Add GPIO DT nodes for Stingray SOC Date: Sat, 6 May 2017 17:24:43 +0530 Message-Id: <1494071686-19098-9-git-send-email-anup.patel@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494071686-19098-1-git-send-email-anup.patel@broadcom.com> References: <1494071686-19098-1-git-send-email-anup.patel@broadcom.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Pramod Kumar The GPIOs on Stingray SOC are based on iProc GPIOs hence using this we add GPIO DT nodes for Stingray SOC. Signed-off-by: Pramod Kumar Reviewed-by: Ray Jui Reviewed-by: Scott Branden --- .../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi index f9a8e8d..fb51473 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi @@ -258,6 +258,40 @@ #include "stingray-clock.dtsi" #include "stingray-pinctrl.dtsi" + gpio_crmu: gpio@66424800 { + compatible = "brcm,iproc-gpio"; + reg = <0x66424800 0x4c>; + ngpios = <6>; + #gpio-cells = <2>; + gpio-controller; + }; + + gpio_hsls: gpio@689d0000 { + compatible = "brcm,iproc-gpio"; + reg = <0x689d0000 0x864>; + ngpios = <151>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + interrupts = ; + gpio-ranges = <&pinmux 0 0 16>, + <&pinmux 16 71 2>, + <&pinmux 18 131 8>, + <&pinmux 26 83 6>, + <&pinmux 32 123 4>, + <&pinmux 36 43 24>, + <&pinmux 60 89 2>, + <&pinmux 62 73 4>, + <&pinmux 66 95 28>, + <&pinmux 94 127 4>, + <&pinmux 98 139 10>, + <&pinmux 108 16 27>, + <&pinmux 135 77 6>, + <&pinmux 141 67 4>, + <&pinmux 145 149 6>, + <&pinmux 151 91 4>; + }; + uart0: uart@68a00000 { device_type = "serial"; compatible = "snps,dw-apb-uart";