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nxp.com; dkim=none (message not signed) header.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Received: from tx30smr01.am.freescale.net (192.88.168.50) by BN1BFFO11FD043.mail.protection.outlook.com (10.58.144.106) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1075.5 via Frontend Transport; Mon, 15 May 2017 13:59:25 +0000 Received: from b29396-OptiPlex-7040.ap.freescale.net (b29396-OptiPlex-7040.ap.freescale.net [10.192.242.182]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id v4FDxEqi015180; Mon, 15 May 2017 06:59:22 -0700 From: Dong Aisheng To: CC: , , , , , , , Dong Aisheng Subject: [PATCH 2/9] clk: reparent orphans after critical clocks enabled Date: Mon, 15 May 2017 21:59:16 +0800 Message-ID: <1494856763-6543-3-git-send-email-aisheng.dong@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494856763-6543-1-git-send-email-aisheng.dong@nxp.com> References: <1494856763-6543-1-git-send-email-aisheng.dong@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131393303655702036; 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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN1PR03MB169 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The orphan clocks reparent operation should be moved after the critical clocks enabled, otherwise it may get a chance to disable a newly registered critical clock which triggers the following warning. [ 0.000000] WARNING: CPU: 0 PID: 0 at drivers/clk/clk.c:597 clk_core_disable+0xb4/0xe0 [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.11.0-rc1-00056-gdff1f66-dirty #1373 [ 0.000000] Hardware name: Generic DT based system [ 0.000000] Backtrace: [ 0.000000] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 0.000000] r6:600000d3 r5:00000000 r4:c0e26358 r3:00000000 [ 0.000000] [] (show_stack) from [] (dump_stack+0xb4/0xe8) [ 0.000000] [] (dump_stack) from [] (__warn+0xd8/0x104) [ 0.000000] r10:c0c21cd0 r9:c048aa78 r8:00000255 r7:00000009 r6:c0c1cd90 r5:00000000 [ 0.000000] r4:00000000 r3:c0e01d34 [ 0.000000] [] (__warn) from [] (warn_slowpath_null+0x28/0x30) [ 0.000000] r9:00000000 r8:ef00bf80 r7:c165ac4c r6:ef00bf80 r5:ef00bf80 r4:ef00bf80 [ 0.000000] [] (warn_slowpath_null) from [] (clk_core_disable+0xb4/0xe0) [ 0.000000] [] (clk_core_disable) from [] (clk_core_disable_lock+0x20/0x2c) [ 0.000000] r4:000000d3 r3:c0e0af00 [ 0.000000] [] (clk_core_disable_lock) from [] (clk_core_disable_unprepare+0x14/0x28) [ 0.000000] r5:00000000 r4:ef00bf80 [ 0.000000] [] (clk_core_disable_unprepare) from [] (__clk_set_parent_after+0x38/0x54) [ 0.000000] r4:ef00bd80 r3:000010a0 [ 0.000000] [] (__clk_set_parent_after) from [] (clk_register+0x4d0/0x648) [ 0.000000] r6:ef00d500 r5:ef00bf80 r4:ef00bd80 r3:ef00bfd4 [ 0.000000] [] (clk_register) from [] (clk_hw_register+0x10/0x1c) [ 0.000000] r9:00000000 r8:00000003 r7:00000000 r6:00000824 r5:00000001 r4:ef00d500 [ 0.000000] [] (clk_hw_register) from [] (_register_divider+0xcc/0x120) [ 0.000000] [] (_register_divider) from [] (clk_register_divider+0x44/0x54) [ 0.000000] r10:00000004 r9:00000003 r8:00000001 r7:00000000 r6:00000003 r5:00000001 [ 0.000000] r4:f0810030 [ 0.000000] [] (clk_register_divider) from [] (imx7ulp_clocks_init+0x558/0xe98) [ 0.000000] r7:c0e296f8 r6:c165c808 r5:00000000 r4:c165c808 [ 0.000000] [] (imx7ulp_clocks_init) from [] (of_clk_init+0x118/0x1e0) [ 0.000000] r10:00000001 r9:c0e01f68 r8:00000000 r7:c0e01f60 r6:ef7f8974 r5:ef0035c0 [ 0.000000] r4:00000006 [ 0.000000] [] (of_clk_init) from [] (time_init+0x2c/0x38) [ 0.000000] r10:efffed40 r9:c0d61a48 r8:c0e78000 r7:c0e07900 r6:ffffffff r5:c0e78000 [ 0.000000] r4:00000000 [ 0.000000] [] (time_init) from [] (start_kernel+0x218/0x394) [ 0.000000] [] (start_kernel) from [<6000807c>] (0x6000807c) [ 0.000000] r10:00000000 r9:410fc075 r8:6000406a r7:c0e0c930 r6:c0d61a44 r5:c0e07918 [ 0.000000] r4:c0e78294 [ 0.000000] ---[ end trace 0000000000000000 ]--- Cc: Stephen Boyd Cc: Michael Turquette Cc: Shawn Guo Signed-off-by: Dong Aisheng --- drivers/clk/clk.c | 39 ++++++++++++++++++++------------------- 1 file changed, 20 insertions(+), 19 deletions(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index fc58c52..e2955b1 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -2471,25 +2471,6 @@ static int __clk_core_init(struct clk_core *core) core->rate = core->req_rate = rate; /* - * walk the list of orphan clocks and reparent any that newly finds a - * parent. - */ - hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { - struct clk_core *parent = __clk_init_parent(orphan); - - /* - * we could call __clk_set_parent, but that would result in a - * redundant call to the .set_rate op, if it exists - */ - if (parent) { - __clk_set_parent_before(orphan, parent); - __clk_set_parent_after(orphan, parent, NULL); - __clk_recalc_accuracies(orphan); - __clk_recalc_rates(orphan, 0); - } - } - - /* * optional platform-specific magic * * The .init callback is not used by any of the basic clock types, but @@ -2511,6 +2492,26 @@ static int __clk_core_init(struct clk_core *core) } kref_init(&core->ref); + + /* + * walk the list of orphan clocks and reparent any that newly finds a + * parent. + */ + hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { + struct clk_core *parent = __clk_init_parent(orphan); + + /* + * we could call __clk_set_parent, but that would result in a + * redundant call to the .set_rate op, if it exists + */ + if (parent) { + __clk_set_parent_before(orphan, parent); + __clk_set_parent_after(orphan, parent, NULL); + __clk_recalc_accuracies(orphan); + __clk_recalc_rates(orphan, 0); + } + } + out: clk_prepare_unlock();