| Message ID | 1494856763-6543-4-git-send-email-aisheng.dong@nxp.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
On 05/15, Dong Aisheng wrote: > diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h > index a6efbb9..4466cae 100644 > --- a/include/linux/clk-provider.h > +++ b/include/linux/clk-provider.h > @@ -557,6 +557,11 @@ void clk_hw_unregister_fixed_factor(struct clk_hw *hw); > * @lock: register lock > * > * Clock with adjustable fractional divider affecting its output frequency. > + * > + * Flags: > + * CLK_FRAC_DIVIDER_ZERO_BASED - by default the divisor is the value read > + * from the register. If CLK_FRAC_DIVIDER_ZERO_BASED is set then the > + * divider is the raw value read from the register plus one. This should say the numerator and denominator are both the value read plus one. It isn't clear if it applies to the numerator, or the denominator, or both. > */ > struct clk_fractional_divider { > struct clk_hw hw;
On Mon, Jun 19, 2017 at 06:55:47PM -0700, Stephen Boyd wrote: > On 05/15, Dong Aisheng wrote: > > diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h > > index a6efbb9..4466cae 100644 > > --- a/include/linux/clk-provider.h > > +++ b/include/linux/clk-provider.h > > @@ -557,6 +557,11 @@ void clk_hw_unregister_fixed_factor(struct clk_hw *hw); > > * @lock: register lock > > * > > * Clock with adjustable fractional divider affecting its output frequency. > > + * > > + * Flags: > > + * CLK_FRAC_DIVIDER_ZERO_BASED - by default the divisor is the value read > > + * from the register. If CLK_FRAC_DIVIDER_ZERO_BASED is set then the > > + * divider is the raw value read from the register plus one. > > This should say the numerator and denominator are both the value > read plus one. It isn't clear if it applies to the numerator, or > the denominator, or both. > Good suggestion. Will improve it. Regards Dong Aisheng > > */ > > struct clk_fractional_divider { > > struct clk_hw hw; > > -- > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, > a Linux Foundation Collaborative Project > -- > To unsubscribe from this list: send the line "unsubscribe linux-clk" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c index aab9046..455bec5 100644 --- a/drivers/clk/clk-fractional-divider.c +++ b/drivers/clk/clk-fractional-divider.c @@ -40,6 +40,11 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw *hw, m = (val & fd->mmask) >> fd->mshift; n = (val & fd->nmask) >> fd->nshift; + if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) { + m++; + n++; + } + if (!n || !m) return parent_rate; @@ -91,6 +96,11 @@ static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate, GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0), &m, &n); + if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) { + m--; + n--; + } + if (fd->lock) spin_lock_irqsave(fd->lock, flags); else diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index a6efbb9..4466cae 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -557,6 +557,11 @@ void clk_hw_unregister_fixed_factor(struct clk_hw *hw); * @lock: register lock * * Clock with adjustable fractional divider affecting its output frequency. + * + * Flags: + * CLK_FRAC_DIVIDER_ZERO_BASED - by default the divisor is the value read + * from the register. If CLK_FRAC_DIVIDER_ZERO_BASED is set then the + * divider is the raw value read from the register plus one. */ struct clk_fractional_divider { struct clk_hw hw; @@ -573,6 +578,8 @@ struct clk_fractional_divider { #define to_clk_fd(_hw) container_of(_hw, struct clk_fractional_divider, hw) +#define CLK_FRAC_DIVIDER_ZERO_BASED BIT(0) + extern const struct clk_ops clk_fractional_divider_ops; struct clk *clk_register_fractional_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags,
Adding CLK_FRAC_DIVIDER_ZERO_BASED flag to indicate the numerator and denominator value in register are start from 0. This can be used to support frac dividers like below: Divider output clock = Divider input clock x [(frac +1) / (div +1)] where frac/div in register is: 000b - Divide by 1. 001b - Divide by 2. 010b - Divide by 3. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> --- drivers/clk/clk-fractional-divider.c | 10 ++++++++++ include/linux/clk-provider.h | 7 +++++++ 2 files changed, 17 insertions(+)