From patchwork Tue May 16 11:30:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 9728941 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D62FE602DB for ; Tue, 16 May 2017 11:33:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C822728A19 for ; Tue, 16 May 2017 11:33:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BC66C28A1C; Tue, 16 May 2017 11:33:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4139028A19 for ; Tue, 16 May 2017 11:33:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751913AbdEPLdU (ORCPT ); Tue, 16 May 2017 07:33:20 -0400 Received: from mail-qk0-f179.google.com ([209.85.220.179]:36719 "EHLO mail-qk0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751634AbdEPLdR (ORCPT ); Tue, 16 May 2017 07:33:17 -0400 Received: by mail-qk0-f179.google.com with SMTP id u75so124935421qka.3 for ; Tue, 16 May 2017 04:33:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fiUym7xc6yJvKLDxOd1AUvDmnzkmNVe7Fxla02NJSso=; b=PRcOlkmAmHnwzBz0osUH2oxTUdEcUuKuFgEcofClruCPzr/AE1D35jBMro9GiqEBaZ fay9GT3K1Q6RkTQr2Xx8OTOHjZO/Y5cX0PTdoNHQSiOe8osbZU5+A906LFoRCtbc+sk+ g3Ia+iFKksjK/oXAztA0S7YIGzviXTD+7soAI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fiUym7xc6yJvKLDxOd1AUvDmnzkmNVe7Fxla02NJSso=; b=ix6FlOKO+/nMI1t6e5+9DiDRIQEOUe1RSrTuhc8sgF/uSaOlBUFkPEuXnlt9SRX4iv 1Fv0CmY+LyLV1GbIbYEeVhD7HYsh45GLTM4iy5wj8T+8sATN73q+MUIv1mQuRF/w0rwc yXGXSbokZPA18sFhMiEx9oIg2lKL5Uny6HEu8hJA+0sZUEG3nrOpeNqOp+zz6MRX/k+Y nyRrQfIjpP40bI4lNRX2uPkaNiyj437KflGjCUsdT8nZUyu6bN9hbbEGv09ucLVwlyEV cUZEfopr0AuPIwSZ8dhEy9YhzRGfeIzVpGpRS9slPPluCgXg/+zAZ0Y35Z2XbotAFJsT JOVQ== X-Gm-Message-State: AODbwcCn25hWmDf24e1XR1gqvuLPlnCQ7cnVGKRMyp2Ehja0s29tw3Gj 15MvzP0gsZPezXC0 X-Received: by 10.55.25.80 with SMTP id k77mr9226305qkh.294.1494934396494; Tue, 16 May 2017 04:33:16 -0700 (PDT) Received: from anup-HP-Compaq-8100-Elite-CMT-PC.dhcp.avagotech.net ([192.19.237.250]) by smtp.gmail.com with ESMTPSA id c142sm10417866qkb.10.2017.05.16.04.33.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 16 May 2017 04:33:16 -0700 (PDT) From: Anup Patel To: Rob Herring , Mark Rutland , Michael Turquette Cc: Catalin Marinas , Will Deacon , Ray Jui , Scott Branden , Jon Mason , Florian Fainelli , Oza Pawandeep , Srinath Mannam , Pramod Kumar , Sandeep Tripathy , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, Anup Patel Subject: [PATCH v3 10/11] arm64: dts: Add PL022, PL330 and SP805 DT nodes for Stingray Date: Tue, 16 May 2017 17:00:55 +0530 Message-Id: <1494934256-1350-11-git-send-email-anup.patel@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494934256-1350-1-git-send-email-anup.patel@broadcom.com> References: <1494934256-1350-1-git-send-email-anup.patel@broadcom.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We have two instance of PL022 SPI controllers, one instance of DMA PL330, and one non-secure SP805 Watchdog on Stingray SOC. This patch adds DT nodes for the above mentioned devices in Stingray DT. Signed-off-by: Anup Patel Reviewed-by: Pramod KUMAR Reviewed-by: Ray Jui Reviewed-by: Scott Branden --- .../boot/dts/broadcom/stingray/bcm958742k.dts | 30 +++++++++++++ .../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 52 ++++++++++++++++++++++ 2 files changed, 82 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts b/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts index c309cda..5671669 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts @@ -46,3 +46,33 @@ &uart3 { status = "okay"; }; + +&ssp0 { + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; + cs-gpios = <&gpio_hsls 34 0>; + status = "okay"; + + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + +&ssp1 { + pinctrl-0 = <&spi1_pins>; + pinctrl-names = "default"; + cs-gpios = <&gpio_hsls 96 0>; + status = "okay"; + + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi index 8a077ff..642d42c 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi @@ -279,6 +279,14 @@ status = "disabled"; }; + wdt0: watchdog@689c0000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x000c0000 0x1000>; + interrupts = ; + clocks = <&hsls_25m_div2_clk>, <&hsls_div4_clk>; + clock-names = "wdogclk", "apb_pclk"; + }; + gpio_hsls: gpio@689d0000 { compatible = "brcm,iproc-gpio"; reg = <0x000d0000 0x864>; @@ -359,11 +367,55 @@ status = "disabled"; }; + ssp0: ssp@68a80000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x00180000 0x1000>; + interrupts = ; + clocks = <&hsls_div2_clk>, <&hsls_div2_clk>; + clock-names = "spiclk", "apb_pclk"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + ssp1: ssp@68a90000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0x00190000 0x1000>; + interrupts = ; + clocks = <&hsls_div2_clk>, <&hsls_div2_clk>; + clock-names = "spiclk", "apb_pclk"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + hwrng: hwrng@68b20000 { compatible = "brcm,iproc-rng200"; reg = <0x00220000 0x28>; }; + dma0: dma@68c10000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x00310000 0x1000>; + interrupts = , + , + , + , + , + , + , + , + ; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; + clocks = <&hsls_div2_clk>; + clock-names = "apb_pclk"; + iommus = <&smmu 0x6000 0x0000>; + }; + nand: nand@68c60000 { compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; reg = <0x00360000 0x600>,