From patchwork Tue May 16 11:30:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 9728949 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 04AFC602DB for ; Tue, 16 May 2017 11:33:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EB4DB2882D for ; Tue, 16 May 2017 11:33:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E01A628A19; Tue, 16 May 2017 11:33:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 620FD2882D for ; Tue, 16 May 2017 11:33:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752101AbdEPLdc (ORCPT ); Tue, 16 May 2017 07:33:32 -0400 Received: from mail-qk0-f180.google.com ([209.85.220.180]:33153 "EHLO mail-qk0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752697AbdEPLda (ORCPT ); Tue, 16 May 2017 07:33:30 -0400 Received: by mail-qk0-f180.google.com with SMTP id y201so125451828qka.0 for ; Tue, 16 May 2017 04:33:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wowiYIj9ckW8JX7EB61kV1QYYejtnTAvF8jgDFfnT0w=; b=eGAbZuzfVQpHa+EgLEWUN5gVPfYfo61LX6DuL8URAPMHRRv9t8n80zWECLwCHrNmsu 3eQ52ehiFlMra6VZJRnaVkKWun/4pq1LUPQCnFN70QTv88zLVqP/RWYhaidACkB7TdpE BwWBpROK2tJoaNBUdMGfsyRjnUYdOW1ZyaYw0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wowiYIj9ckW8JX7EB61kV1QYYejtnTAvF8jgDFfnT0w=; b=tUj9s5GFeRcxeYcK2V6iEOfZaoizoym2VE9V5BfSerAOgVhcW0z3xPRo1FWQu0YH7f EiSIMAD2Z05q30bXAGycSc144lNjdS3NWH7gVfzmIIIorXap/oNcYz1Y4swr1ujf8BdT qkTG+YgDP4MjBaLCaUEBQGOTpOJ0lYlLmMjSKpgFneFLw62xwy4yXEi1rAQQLdC1MDkq x7PnoKzitEZlSAZIVw29sFT2RR2qPYuT51J8Zj6BSbRn0PLWxZ/GlSX3tmEuggWkDHb6 P14OX3DTJeQpqSMF+8/mnmIw5SKz1koziqJZ3KpGhe4ifSNoD197CB7jKwW+/WKzQM8H LOcw== X-Gm-Message-State: AODbwcBpKdSUyxw7gx79jZsQATWkaonJOqXLlnIYNTtQsaFLb3PDqEdP BT2gX+O8vlL0Y2GZ X-Received: by 10.55.54.202 with SMTP id d193mr10528718qka.160.1494934403903; Tue, 16 May 2017 04:33:23 -0700 (PDT) Received: from anup-HP-Compaq-8100-Elite-CMT-PC.dhcp.avagotech.net ([192.19.237.250]) by smtp.gmail.com with ESMTPSA id c142sm10417866qkb.10.2017.05.16.04.33.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 16 May 2017 04:33:23 -0700 (PDT) From: Anup Patel To: Rob Herring , Mark Rutland , Michael Turquette Cc: Catalin Marinas , Will Deacon , Ray Jui , Scott Branden , Jon Mason , Florian Fainelli , Oza Pawandeep , Srinath Mannam , Pramod Kumar , Sandeep Tripathy , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, Anup Patel Subject: [PATCH v3 11/11] arm64: dts: Add PWM and SDHCI DT nodes for Stingray SOC Date: Tue, 16 May 2017 17:00:56 +0530 Message-Id: <1494934256-1350-12-git-send-email-anup.patel@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494934256-1350-1-git-send-email-anup.patel@broadcom.com> References: <1494934256-1350-1-git-send-email-anup.patel@broadcom.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Srinath Mannam The Stingray SoC has two instances of SDHCI controller and one instance of iProc PWM. Let's enable above mentioned devices in Stingray DT. Signed-off-by: Srinath Mannam Signed-off-by: Anup Patel Reviewed-by: Ray Jui Reviewed-by: Scott Branden --- .../boot/dts/broadcom/stingray/bcm958742-base.dtsi | 39 ++++++++++++++++++++++ .../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 28 ++++++++++++++++ 2 files changed, 67 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi index ff59a26..5dca7d1 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi @@ -43,6 +43,28 @@ serial2 = &uart2; serial3 = &uart3; }; + + sdio0_vddo_ctrl_reg: sdio0_vddo_ctrl { + compatible = "regulator-gpio"; + regulator-name = "sdio0_vddo_ctrl_reg"; + regulator-type = "voltage"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + gpios = <&pca9505 18 0>; + states = <3300000 0x0 + 1800000 0x1>; + }; + + sdio1_vddo_ctrl_reg: sdio1_vddo_ctrl { + compatible = "regulator-gpio"; + regulator-name = "sdio1_vddo_ctrl_reg"; + regulator-type = "voltage"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + gpios = <&pca9505 19 0>; + states = <3300000 0x0 + 1800000 0x1>; + }; }; &memory { /* Default DRAM banks */ @@ -54,6 +76,10 @@ status = "okay"; }; +&pwm { + status = "okay"; +}; + &i2c0 { status = "okay"; @@ -90,3 +116,16 @@ #size-cells = <1>; }; }; + +&sdio0 { + vqmmc-supply = <&sdio0_vddo_ctrl_reg>; + non-removable; + full-pwr-cycle; + status = "okay"; +}; + +&sdio1 { + vqmmc-supply = <&sdio1_vddo_ctrl_reg>; + full-pwr-cycle; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi index 642d42c..44ed73c 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi @@ -269,6 +269,14 @@ #include "stingray-pinctrl.dtsi" + pwm: pwm@68910000{ + compatible = "brcm,iproc-pwm"; + reg = <0x00010000 0x1000>; + clocks = <&crmu_ref25m>; + #pwm-cells = <3>; + status = "disabled"; + }; + i2c0: i2c@689b0000 { compatible = "brcm,iproc-i2c"; reg = <0x000b0000 0x100>; @@ -428,5 +436,25 @@ brcm,nand-has-wp; status = "disabled"; }; + + sdio0: sdhci@68cf1000 { + compatible = "brcm,sdhci-iproc"; + reg = <0x003f1000 0x100>; + interrupts = ; + bus-width = <8>; + clocks = <&sdio0_clk>; + iommus = <&smmu 0x6002 0x0000>; + status = "disabled"; + }; + + sdio1: sdhci@68cf2000 { + compatible = "brcm,sdhci-iproc"; + reg = <0x003f2000 0x100>; + interrupts = ; + bus-width = <8>; + clocks = <&sdio1_clk>; + iommus = <&smmu 0x6003 0x0000>; + status = "disabled"; + }; }; };