From patchwork Mon Jul 31 12:42:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 9871771 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 697C160365 for ; Mon, 31 Jul 2017 12:43:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5DFBE285C8 for ; Mon, 31 Jul 2017 12:43:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 525EC285D2; Mon, 31 Jul 2017 12:43:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B163B285CB for ; Mon, 31 Jul 2017 12:43:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752147AbdGaMnf (ORCPT ); Mon, 31 Jul 2017 08:43:35 -0400 Received: from mail-wm0-f43.google.com ([74.125.82.43]:36275 "EHLO mail-wm0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752255AbdGaMmm (ORCPT ); Mon, 31 Jul 2017 08:42:42 -0400 Received: by mail-wm0-f43.google.com with SMTP id t201so178236283wmt.1 for ; Mon, 31 Jul 2017 05:42:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=b7i59rdVTaPJSNZY5wM3lp3p8yLkZ72JM07SsPsCAKk=; b=H/tDcj6zNf89VTSDcYN+lXA3p6OiuqkeDE+YKfk76XcUnHJWjr9JQc9p941f8OYzMz oSu6zFfHxokpg07ESM8WeXvKv9T+H4M+jS4GSfMz/SskZb61rAyY1i4cecNJZfMxZ9fx qabyjyKsS81gofA2wsXeRGIBmkMmUlj3wOYq4wP6lPR6fky6nZBw9LTXtIQgvd2wbwco tUmcKY7DebD6g57g6VL/yxdHpI1D4Me5skt2a5+0ruL4VMH1qgg+cGYC8WIMgAzyLop/ P027t7aNXHgx7EJwaDIC8qIhQSfhNTwTOAslZaHkN9VCuw9QYuZ5DaJWT6dExm9d/puU ZpFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=b7i59rdVTaPJSNZY5wM3lp3p8yLkZ72JM07SsPsCAKk=; b=Vb++2wV+G+1tTqvnHnjo+++wa0GVBbtSI6M44GBHC13hB55V/vepdyPhkznWx7u5jL FF+BCc8wIWdWSiSyQ2vE/7UrLKx50d6nmGR/bh8AT/EJ6rILwlDvOZout9sM6zxAOh1v xvaiQib3QB+cHCoLhWDxAohyea4PrWN4tjwcsizANmggymZkEvvReg/g4bVCkRWHKPRJ kuoEieWnA6LiET6Y0YsmFxCVf8dbbTXCU3/ajLiOSyy9AjfHAQ+E8nMcd26IEgi/cWy/ 5S/yDWI1NdZ9gAa/Ggqs75NqZkj0sHTDZHBWY4EryNZa28EK4bm/inZUd2X+vGhWP2It iDqg== X-Gm-Message-State: AIVw111wSSmF3r5Gnz/q+gzaO8MrI9WtS+0oxe6DwdtNMxWd1iuWk3MK GfLOJtwrOm+mcpFB X-Received: by 10.28.0.19 with SMTP id 19mr10724271wma.168.1501504961142; Mon, 31 Jul 2017 05:42:41 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id i15sm11291455wmd.13.2017.07.31.05.42.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 31 Jul 2017 05:42:40 -0700 (PDT) From: Neil Armstrong To: jbrunet@baylibre.com, narmstrong@baylibre.com Cc: linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 1/4] dt-bindings: clock: amlogic, gxbb-aoclkc: Update bindings Date: Mon, 31 Jul 2017 14:42:34 +0200 Message-Id: <1501504957-19476-2-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1501504957-19476-1-git-send-email-narmstrong@baylibre.com> References: <1501504957-19476-1-git-send-email-narmstrong@baylibre.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On the first revision of the bindings, only the gates + resets were known in the AO Clock HW, but more registers used to configures AO clock are known to be spread among the AO register space. This patch adds a parent node for the entire system control zone for the AO domain then moves the clock controller as a subnode of the system control node. Signed-off-by: Neil Armstrong --- .../bindings/clock/amlogic,gxbb-aoclkc.txt | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt index a55d31b..64884ed 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt +++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt @@ -5,9 +5,11 @@ controllers within the Always-On part of the SoC. Required Properties: -- compatible: should be "amlogic,gxbb-aoclkc" -- reg: physical base address of the clock controller and length of memory - mapped region. +- compatible: value should be different for each SoC family as : + - GXBB (S905) : "amlogic,meson-gxbb-aoclkc" + - GXL (S905X, S905D) : "amlogic,meson-gxl-aoclkc" + - GXM (S912) : "amlogic,meson-gxm-aoclkc" + followed by the common "amlogic,meson-gx-aoclkc" - #clock-cells: should be 1. @@ -23,14 +25,22 @@ to specify the reset which they consume. All available resets are defined as preprocessor macros in the dt-bindings/reset/gxbb-aoclkc.h header and can be used in device tree sources. +Parent node should have the following properties : +- compatible: "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd" +- reg: base address and size of the AO system control register space. + Example: AO Clock controller node: - clkc_AO: clock-controller@040 { - compatible = "amlogic,gxbb-aoclkc"; - reg = <0x0 0x040 0x0 0x4>; +ao_sysctrl: sys-ctrl@0 { + compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd"; + reg = <0x0 0x0 0x0 0x100>; + + clkc_AO: clock-controller { + compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc"; #clock-cells = <1>; #reset-cells = <1>; }; +}; Example: UART controller node that consumes the clock and reset generated by the clock controller: