From patchwork Wed Aug 2 08:33:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Yan X-Patchwork-Id: 9876203 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 76A886037D for ; Wed, 2 Aug 2017 08:33:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 65CA828796 for ; Wed, 2 Aug 2017 08:33:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5A1662879A; Wed, 2 Aug 2017 08:33:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A7D1928796 for ; Wed, 2 Aug 2017 08:33:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752299AbdHBIdU (ORCPT ); Wed, 2 Aug 2017 04:33:20 -0400 Received: from regular1.263xmail.com ([211.150.99.134]:56458 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752120AbdHBIdT (ORCPT ); Wed, 2 Aug 2017 04:33:19 -0400 Received: from andy.yan?rock-chips.com (unknown [192.168.167.174]) by regular1.263xmail.com (Postfix) with ESMTP id 56369919F; Wed, 2 Aug 2017 16:33:15 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id 83B1539A; Wed, 2 Aug 2017 16:33:11 +0800 (CST) X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: yxj@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 317443FPNAQ; Wed, 02 Aug 2017 16:33:15 +0800 (CST) From: Andy Yan To: heiko@sntech.de Cc: robh+dt@kernel.org, shawn.lin@rock-chips.com, zhangqing@rock-chips.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mturquette@baylibre.com, sboyd@codeaurora.org, linux-rockchip@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Andy Yan Subject: [PATCH v2 05/23] clk: rockchip: fix up the pll clks error for rv1108 SoC Date: Wed, 2 Aug 2017 16:33:04 +0800 Message-Id: <1501662784-11973-1-git-send-email-andy.yan@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1501662303-11687-1-git-send-email-andy.yan@rock-chips.com> References: <1501662303-11687-1-git-send-email-andy.yan@rock-chips.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Elaine Zhang fix up the lock_shift describe error. remove the ROCKCHIP_PLL_SYNC_RATE flag for gpll. Signed-off-by: Elaine Zhang Signed-off-by: Andy Yan --- Changes in v2: None drivers/clk/rockchip/clk-rv1108.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/rockchip/clk-rv1108.c b/drivers/clk/rockchip/clk-rv1108.c index 3c670db..9c6bad0 100644 --- a/drivers/clk/rockchip/clk-rv1108.c +++ b/drivers/clk/rockchip/clk-rv1108.c @@ -148,11 +148,11 @@ PNAME(mux_i2s2_p) = { "i2s2_src", "i2s2_frac", "xin12m" }; static struct rockchip_pll_clock rv1108_pll_clks[] __initdata = { [apll] = PLL(pll_rk3399, PLL_APLL, "apll", mux_pll_p, 0, RV1108_PLL_CON(0), - RV1108_PLL_CON(3), 8, 31, 0, rv1108_pll_rates), + RV1108_PLL_CON(3), 8, 0, 0, rv1108_pll_rates), [dpll] = PLL(pll_rk3399, PLL_DPLL, "dpll", mux_pll_p, 0, RV1108_PLL_CON(8), - RV1108_PLL_CON(11), 8, 31, 0, NULL), + RV1108_PLL_CON(11), 8, 1, 0, NULL), [gpll] = PLL(pll_rk3399, PLL_GPLL, "gpll", mux_pll_p, 0, RV1108_PLL_CON(16), - RV1108_PLL_CON(19), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rv1108_pll_rates), + RV1108_PLL_CON(19), 8, 2, 0, rv1108_pll_rates), }; #define MFLAGS CLK_MUX_HIWORD_MASK