From patchwork Tue Aug 15 06:42:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Weiyi Lu X-Patchwork-Id: 9901089 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DE97760244 for ; Tue, 15 Aug 2017 06:44:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CF9941FFB2 for ; Tue, 15 Aug 2017 06:44:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C3E71287A1; Tue, 15 Aug 2017 06:44:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3D3552879D for ; Tue, 15 Aug 2017 06:44:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752990AbdHOGoR (ORCPT ); Tue, 15 Aug 2017 02:44:17 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:52687 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1753301AbdHOGoC (ORCPT ); Tue, 15 Aug 2017 02:44:02 -0400 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1157941057; Tue, 15 Aug 2017 14:43:54 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Tue, 15 Aug 2017 14:43:53 +0800 Received: from mtkslt210.mediatek.inc (10.21.14.14) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Tue, 15 Aug 2017 14:43:53 +0800 From: To: Matthias Brugger , Stephen Boyd CC: James Liao , Fan Chen , , , , , , , Weiyi Lu Subject: [PATCH v1 9/9] arm: dts: Add power controller device node of MT2712 Date: Tue, 15 Aug 2017 14:42:50 +0800 Message-ID: <1502779370-30150-10-git-send-email-weiyi.lu@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1502779370-30150-1-git-send-email-weiyi.lu@mediatek.com> References: <1502779370-30150-1-git-send-email-weiyi.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Weiyi Lu add power controller node for MT2712 Signed-off-by: Weiyi Lu --- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index 6338a1f..3fc2eee 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -165,6 +165,21 @@ interrupts = ; }; + scpsys: scpsys@10006000 { + compatible = "mediatek,mt2712-scpsys", "syscon"; + #power-domain-cells = <1>; + reg = <0 0x10006000 0 0x1000>; + clocks = <&topckgen CLK_TOP_MM_SEL>, + <&topckgen CLK_TOP_MFG_SEL>, + <&topckgen CLK_TOP_VENC_SEL>, + <&topckgen CLK_TOP_JPGDEC_SEL>, + <&topckgen CLK_TOP_A1SYS_HP_SEL>, + <&topckgen CLK_TOP_VDEC_SEL>; + clock-names = "mm", "mfg", "venc", + "jpgdec", "audio", "vdec"; + infracfg = <&infracfg>; + }; + uart5: serial@1000f000 { compatible = "mediatek,mt2712-uart", "mediatek,mt6577-uart";