From patchwork Tue Sep 26 12:23:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhishek Sahu X-Patchwork-Id: 9971921 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B9DC56037F for ; Tue, 26 Sep 2017 12:27:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A2FEC1FE8D for ; Tue, 26 Sep 2017 12:27:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 97BE7209CD; Tue, 26 Sep 2017 12:27:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DA05728F01 for ; Tue, 26 Sep 2017 12:27:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S967686AbdIZM06 (ORCPT ); Tue, 26 Sep 2017 08:26:58 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:53616 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935503AbdIZMYW (ORCPT ); Tue, 26 Sep 2017 08:24:22 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id D892C60960; Tue, 26 Sep 2017 12:24:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1506428662; bh=j8b7AnrmEYSxrV1H4pB22GYO4AjrdRQzvLDXlzhXTY0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RRFIdfWZXQdgM2en8fPOP03N/iZw/A2j9dFqmDfWtgg7IA/GWTj3WUHoYbWP/RUFm +n7v1nGYzqoogQk7YFtG9ZmFGCcwlnF+7hdasmDmdD2I8I6MUmQ84WKK8SdMI8ZNB9 LH+9eNLMDn/I2PDwRu+GYmcSuv7rCcPLsDgWTCr4= Received: from absahu-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: absahu@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id D888F60C55; Tue, 26 Sep 2017 12:24:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1506428660; bh=j8b7AnrmEYSxrV1H4pB22GYO4AjrdRQzvLDXlzhXTY0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bhb38p4njxUEykLsrJBiDf+cCKKtn8w/8sseGfC0YNLAD/4c1UkUhPAtCbvcDW31d xfpGYyEt+FkqeDS2jjjstwwsGZETY1UuPOlEQrlvjMKdUbd776kqfkqanqEYRmo0U3 Xo6qKlcoWjIPzQGCVcYFR5xg0StyJXZo8MFyRW9M= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org D888F60C55 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=absahu@codeaurora.org From: Abhishek Sahu To: Stephen Boyd , Michael Turquette Cc: Andy Gross , David Brown , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Abhishek Sahu Subject: [PATCH 02/11] clk: qcom: add parent map for regmap mux Date: Tue, 26 Sep 2017 17:53:55 +0530 Message-Id: <1506428644-2996-3-git-send-email-absahu@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1506428644-2996-1-git-send-email-absahu@codeaurora.org> References: <1506428644-2996-1-git-send-email-absahu@codeaurora.org> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently the driver assumes the register configuration value is identical to its index in the parent map. This patch adds the parent map field in regmap mux clock node which contains the mapping of parent index with actual register configuration value. If regmap node contains this parent map then the configuration value will be taken from this parent map instead of simply writing the index value. Signed-off-by: Abhishek Sahu --- drivers/clk/qcom/clk-rcg.h | 10 ---------- drivers/clk/qcom/clk-regmap-mux.c | 6 ++++++ drivers/clk/qcom/clk-regmap-mux.h | 2 ++ drivers/clk/qcom/common.h | 11 ++++++++++- 4 files changed, 18 insertions(+), 11 deletions(-) diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h index 1b3e8d2..ee66857 100644 --- a/drivers/clk/qcom/clk-rcg.h +++ b/drivers/clk/qcom/clk-rcg.h @@ -26,16 +26,6 @@ struct freq_tbl { }; /** - * struct parent_map - map table for PLL source select configuration values - * @src: source PLL - * @cfg: configuration value - */ -struct parent_map { - u8 src; - u8 cfg; -}; - -/** * struct mn - M/N:D counter * @mnctr_en_bit: bit to enable mn counter * @mnctr_reset_bit: bit to assert mn counter reset diff --git a/drivers/clk/qcom/clk-regmap-mux.c b/drivers/clk/qcom/clk-regmap-mux.c index cae3071..0f3a1bd 100644 --- a/drivers/clk/qcom/clk-regmap-mux.c +++ b/drivers/clk/qcom/clk-regmap-mux.c @@ -35,6 +35,9 @@ static u8 mux_get_parent(struct clk_hw *hw) val >>= mux->shift; val &= mask; + if (mux->parent_map) + return qcom_find_src_index(hw, mux->parent_map, val); + return val; } @@ -45,6 +48,9 @@ static int mux_set_parent(struct clk_hw *hw, u8 index) unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift); unsigned int val; + if (mux->parent_map) + index = mux->parent_map[index].cfg; + val = index; val <<= mux->shift; diff --git a/drivers/clk/qcom/clk-regmap-mux.h b/drivers/clk/qcom/clk-regmap-mux.h index 5cec761..7797cdd 100644 --- a/drivers/clk/qcom/clk-regmap-mux.h +++ b/drivers/clk/qcom/clk-regmap-mux.h @@ -16,11 +16,13 @@ #include #include "clk-regmap.h" +#include "common.h" struct clk_regmap_mux { u32 reg; u32 shift; u32 width; + const struct parent_map *parent_map; struct clk_regmap clkr; }; diff --git a/drivers/clk/qcom/common.h b/drivers/clk/qcom/common.h index 23c1927..00196ee 100644 --- a/drivers/clk/qcom/common.h +++ b/drivers/clk/qcom/common.h @@ -20,7 +20,6 @@ struct regmap; struct freq_tbl; struct clk_hw; -struct parent_map; #define PLL_LOCK_COUNT_SHIFT 8 #define PLL_LOCK_COUNT_MASK 0x3f @@ -39,6 +38,16 @@ struct qcom_cc_desc { size_t num_gdscs; }; +/** + * struct parent_map - map table for source select configuration values + * @src: source + * @cfg: configuration value + */ +struct parent_map { + u8 src; + u8 cfg; +}; + extern const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, unsigned long rate); extern const struct freq_tbl *qcom_find_freq_floor(const struct freq_tbl *f,