From patchwork Sat Dec 30 01:12:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 10137599 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BAC7F603FA for ; Sat, 30 Dec 2017 01:20:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AB7BD2A24C for ; Sat, 30 Dec 2017 01:20:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9A61B2ADED; Sat, 30 Dec 2017 01:20:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 26E7328602 for ; Sat, 30 Dec 2017 01:20:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751010AbdL3BT0 (ORCPT ); Fri, 29 Dec 2017 20:19:26 -0500 Received: from mail-wm0-f66.google.com ([74.125.82.66]:36102 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750977AbdL3BNU (ORCPT ); Fri, 29 Dec 2017 20:13:20 -0500 Received: by mail-wm0-f66.google.com with SMTP id b76so50413060wmg.1 for ; Fri, 29 Dec 2017 17:13:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nexus-software-ie.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vfT3c0CQ3OuIO2+UqaI9pEwSVGMAlOMAx7ZOdaN3MlE=; b=RS0p5VU2rxM2jQGyq44sKhQX27qMhyAvgXmluw0YpLVqLi2xc1Uz1+MGrtgd2ZQtFZ mJtBVfxQ4LHGeIr461K7gbey2OJSi8s1OsU/XknwIPFptttDdbmPNfVmR/eEpQDx5F+t U/SipG2iyP4oT2QC+UUnGSZukhlb6ebo8ckjdrm+eiR4thXr1YLZt9Z11MGDo3q0VWjN wJf5Kl1WovAXynREdrRAn0O2mMGklx3P89fuUhYJUp9wZKPNli1h/o8NnYbP1RdCiHXm GyXtFW8fUONg2DvNqtG8Ar4ZNDBQHrJEU3ueSFkgRgey8kt4Tvvx0F+naI38nb+AnFGP SvFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vfT3c0CQ3OuIO2+UqaI9pEwSVGMAlOMAx7ZOdaN3MlE=; b=bxLpWVGMoAFxj1gtfRVahneMIj6MMn+ZBpyWcK6t8koUMIt9YUXY8nbufakGh1Vn+D UuuVca9qv9TD5t7zEXh8MBVIGuoFdEWA3Unywfx2/D4u6keRg4VS1XStTPrAnlGYI0Zk z7mj8n0O/a67ogQer3/18CD/6+vbsm1ikr5YfKglobXzpC7muTJJj2GAFiZtFAmY1OSm dx9vV2/jKXe1WSiy9FUwiK/ouW7JujYtghWNbogJNAlQ979O3CIaBzz1oudZf2YnylTb CKNqa80z7gKZss/qD6ci6LYqXLLVdUp/E7HcayBFb+0VImsqbG2tySQi2Y/+pBpsHMiu akSQ== X-Gm-Message-State: AKGB3mL0BExdU9U2o51mJFMGl3l1h1scezQfyl5r8+Qc4ax/VA8n8eT7 lVKtBZVwite8hvbZ4FktRnUtWg== X-Google-Smtp-Source: ACJfBos0gmgdKa2u3u71p4I6089pGY9AOkfJhk/qdZbyX1wxn+8vAQYbw6jK/8WUB7TrMR1PtifEGA== X-Received: by 10.80.147.14 with SMTP id m14mr46965484eda.121.1514596398889; Fri, 29 Dec 2017 17:13:18 -0800 (PST) Received: from localhost.localdomain ([109.255.42.2]) by smtp.gmail.com with ESMTPSA id h4sm29818268edb.16.2017.12.29.17.13.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 29 Dec 2017 17:13:18 -0800 (PST) From: Bryan O'Donoghue To: mturquette@baylibre.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: pure.logic@nexus-software.ie, Boris Brezillon Subject: [PATCH 06/33] clk: at91: change clk_pll_get_best_div_mul() return logic Date: Sat, 30 Dec 2017 01:12:45 +0000 Message-Id: <1514596392-22270-7-git-send-email-pure.logic@nexus-software.ie> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514596392-22270-1-git-send-email-pure.logic@nexus-software.ie> References: <1514596392-22270-1-git-send-email-pure.logic@nexus-software.ie> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch updates the round_rate() logic here to return zero instead of a negative number on error. In conjunction with higher-level changes associated with acting on the return value of clk_ops->round_rate() it is then possible to have clk_ops->round_rate() return values from 1 Hz to ULONG_MAX Hz instead of the current limitation of 1 Hz to LONG_MAX Hz. Signed-off-by: Bryan O'Donoghue Cc: Boris Brezillon Cc: Michael Turquette Cc: Stephen Boyd Cc: linux-clk@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- drivers/clk/at91/clk-pll.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c index 630203e..1c90ae7 100644 --- a/drivers/clk/at91/clk-pll.c +++ b/drivers/clk/at91/clk-pll.c @@ -157,14 +157,14 @@ static unsigned long clk_pll_get_best_div_mul(struct clk_pll *pll, pll->characteristics; unsigned long bestremainder = ULONG_MAX; unsigned long maxdiv, mindiv, tmpdiv; - long bestrate = -ERANGE; + unsigned long bestrate = 0; unsigned long bestdiv; unsigned long bestmul; int i = 0; /* Check if parent_rate is a valid input rate */ if (parent_rate < characteristics->input.min) - return -ERANGE; + return 0; /* * Calculate minimum divider based on the minimum multiplier, the @@ -179,7 +179,7 @@ static unsigned long clk_pll_get_best_div_mul(struct clk_pll *pll, if (parent_rate > characteristics->input.max) { tmpdiv = DIV_ROUND_UP(parent_rate, characteristics->input.max); if (tmpdiv > PLL_DIV_MAX) - return -ERANGE; + return 0; if (tmpdiv > mindiv) mindiv = tmpdiv; @@ -234,8 +234,8 @@ static unsigned long clk_pll_get_best_div_mul(struct clk_pll *pll, break; } - /* We haven't found any multiplier/divider pair => return -ERANGE */ - if (bestrate < 0) + /* We haven't found any multiplier/divider pair => return 0 */ + if (bestrate == 0) return bestrate; /* Check if bestrate is a valid output rate */ @@ -246,7 +246,7 @@ static unsigned long clk_pll_get_best_div_mul(struct clk_pll *pll, } if (i >= characteristics->num_output) - return -ERANGE; + return 0; if (div) *div = bestdiv; @@ -271,15 +271,15 @@ static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { struct clk_pll *pll = to_clk_pll(hw); - long ret; + unsigned long ret; u32 div; u32 mul; u32 index; ret = clk_pll_get_best_div_mul(pll, rate, parent_rate, &div, &mul, &index); - if (ret < 0) - return ret; + if (ret == 0) + return -ERANGE; pll->range = index; pll->div = div;