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[212.204.172.199]) by smtp.gmail.com with ESMTPSA id r8sm29086992edm.22.2018.01.01.11.35.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 01 Jan 2018 11:35:14 -0800 (PST) From: Bryan O'Donoghue To: mturquette@baylibre.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Bryan O'Donoghue , Tero Kristo , Tony Lindgren , linux-omap@vger.kernel.org Subject: [PATCH v2 28/34] clk: ti: fapll: change round_rate() return logic Date: Mon, 1 Jan 2018 19:34:54 +0000 Message-Id: <1514835300-381-14-git-send-email-pure.logic@nexus-software.ie> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514835300-381-1-git-send-email-pure.logic@nexus-software.ie> References: <1514835300-381-1-git-send-email-pure.logic@nexus-software.ie> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch updates the round_rate() logic here to return zero instead of a negative number on error. In conjunction with higher-level changes associated with acting on the return value of clk_ops->round_rate() it is then possible to have clk_ops->round_rate() return values from 1 Hz to ULONG_MAX Hz instead of the current limitation of 1 Hz to LONG_MAX Hz. Signed-off-by: Bryan O'Donoghue Cc: Tero Kristo Cc: Michael Turquette Cc: Stephen Boyd Cc: Tony Lindgren Cc: linux-omap@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- drivers/clk/ti/fapll.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/ti/fapll.c b/drivers/clk/ti/fapll.c index 2e74437..f435a8c 100644 --- a/drivers/clk/ti/fapll.c +++ b/drivers/clk/ti/fapll.c @@ -227,12 +227,12 @@ static unsigned long ti_fapll_round_rate(struct clk_hw *hw, unsigned long rate, int error; if (!rate) - return -EINVAL; + return 0; error = ti_fapll_set_div_mult(rate, *parent_rate, &pre_div_p, &mult_n); if (error) - return error; + return 0; rate = *parent_rate / pre_div_p; rate *= mult_n; @@ -414,7 +414,7 @@ static unsigned long ti_fapll_synth_round_rate(struct clk_hw *hw, unsigned long r; if (ti_fapll_clock_is_bypass(fd) || !synth->div || !rate) - return -EINVAL; + return 0; /* Only post divider m available with no fractional divider? */ if (!synth->freq) {