From patchwork Thu May 31 00:36:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ray Jui X-Patchwork-Id: 10440111 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B9C9360380 for ; Thu, 31 May 2018 00:37:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ABE3629237 for ; Thu, 31 May 2018 00:37:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A0AF0294EB; Thu, 31 May 2018 00:37:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4F55129237 for ; Thu, 31 May 2018 00:37:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932610AbeEaAgm (ORCPT ); Wed, 30 May 2018 20:36:42 -0400 Received: from mail-qt0-f193.google.com ([209.85.216.193]:44291 "EHLO mail-qt0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932603AbeEaAgj (ORCPT ); Wed, 30 May 2018 20:36:39 -0400 Received: by mail-qt0-f193.google.com with SMTP id d3-v6so25758353qtp.11 for ; Wed, 30 May 2018 17:36:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=RR99YFwFnF4Y9cMyNU737z8LBoD9aqD6dr1TzYcmp/k=; b=LEyhWol1eNK/enHF+ddTmXJwJibnVTflH2iyQ97nKMZIQ0y4eRYtbhsNvfjgl3Wiy+ oWcg4oc0/DWyG43dh7DDr8LlYzWLIriKtJkFCoVxyRFfPlajf5TRbY5JjD+wxXhwAPi4 WQm4vyV+SUsXnzr97pBBePH/x481nx6UrtYz4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RR99YFwFnF4Y9cMyNU737z8LBoD9aqD6dr1TzYcmp/k=; b=uD5wtRfh5VI+pw84IR+Sk3+FKoljNnpXBAynEhJSNHuA/UdgtFPwO0NID4LJh+cZje jEEDM9NQWVNfpn/J6O5rdRNmEb5wUBxauvYCkSrsVjvDjQbDb9Fa0Uz5eFrJFc/307XB 47Vnhhwio9BnhCVs49CzinkV8K7OzvQko/SymiDlCj7H5S3uMgmJxrnDRAS6knrFdKL9 o7PKgtpggF/KDKzcD3Ne/ok7mGthfLMaaRrj3zUDj6dqwoUP5EMK/X3paGELk6kgYKVA QdcoqlqEWR2qKDaSO5YHSuTOQlpWVoLUU55C3EMaOU65M0bZzgELnAZ/cn2iUFmf2fDI RJRg== X-Gm-Message-State: APt69E02GY/Bc81flT4LtL17tnetA24zchK66U6dmDsESCDM/ajl5Y9A rDDn20pWnFFO4Lw6LMwtMZkrRQ== X-Google-Smtp-Source: ADUXVKIHMKJX4chZHpYk/nRlNMMiCSR4bPmnaqT/0u8cABD6tUqq7i0A2e1Uq0OpvtjzOPMRVhdSYA== X-Received: by 2002:ac8:1e99:: with SMTP id c25-v6mr5024180qtm.43.1527726998002; Wed, 30 May 2018 17:36:38 -0700 (PDT) Received: from lbrmn-lnxub44-1.ric.broadcom.com ([192.19.228.250]) by smtp.gmail.com with ESMTPSA id a24-v6sm2549370qth.70.2018.05.30.17.36.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 30 May 2018 17:36:37 -0700 (PDT) From: Ray Jui To: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Pramod Kumar , Ray Jui Subject: [PATCH v2 1/3] dt-bindings: clk: Update Stingray binding doc Date: Wed, 30 May 2018 17:36:18 -0700 Message-Id: <1527726980-11723-2-git-send-email-ray.jui@broadcom.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1527726980-11723-1-git-send-email-ray.jui@broadcom.com> References: <1527726980-11723-1-git-send-email-ray.jui@broadcom.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Pramod Kumar Update Stingray clock binding document to add additional clock entries with names matching the latest ASIC datasheet. Also modify a few existing entries to make their naming more consistent with the rest of the entries Signed-off-by: Pramod Kumar Signed-off-by: Ray Jui --- .../bindings/clock/brcm,iproc-clocks.txt | 26 ++++++++++++---------- 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt index f8e4a93..ab730ea 100644 --- a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt +++ b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt @@ -276,36 +276,38 @@ These clock IDs are defined in: clk_ts_500_ref genpll2 2 BCM_SR_GENPLL2_TS_500_REF_CLK clk_125_nitro genpll2 3 BCM_SR_GENPLL2_125_NITRO_CLK clk_chimp genpll2 4 BCM_SR_GENPLL2_CHIMP_CLK - clk_nic_flash genpll2 5 BCM_SR_GENPLL2_NIC_FLASH + clk_nic_flash genpll2 5 BCM_SR_GENPLL2_NIC_FLASH_CLK + clk_fs genpll2 6 BCM_SR_GENPLL2_FS_CLK genpll3 crystal 0 BCM_SR_GENPLL3 clk_hsls genpll3 1 BCM_SR_GENPLL3_HSLS_CLK clk_sdio genpll3 2 BCM_SR_GENPLL3_SDIO_CLK genpll4 crystal 0 BCM_SR_GENPLL4 - ccn genpll4 1 BCM_SR_GENPLL4_CCN_CLK + clk_ccn genpll4 1 BCM_SR_GENPLL4_CCN_CLK clk_tpiu_pll genpll4 2 BCM_SR_GENPLL4_TPIU_PLL_CLK - noc_clk genpll4 3 BCM_SR_GENPLL4_NOC_CLK + clk_noc genpll4 3 BCM_SR_GENPLL4_NOC_CLK clk_chclk_fs4 genpll4 4 BCM_SR_GENPLL4_CHCLK_FS4_CLK clk_bridge_fscpu genpll4 5 BCM_SR_GENPLL4_BRIDGE_FSCPU_CLK - genpll5 crystal 0 BCM_SR_GENPLL5 - fs4_hf_clk genpll5 1 BCM_SR_GENPLL5_FS4_HF_CLK - crypto_ae_clk genpll5 2 BCM_SR_GENPLL5_CRYPTO_AE_CLK - raid_ae_clk genpll5 3 BCM_SR_GENPLL5_RAID_AE_CLK + clk_fs4_hf genpll5 1 BCM_SR_GENPLL5_FS4_HF_CLK + clk_crypto_ae genpll5 2 BCM_SR_GENPLL5_CRYPTO_AE_CLK + clk_raid_ae genpll5 3 BCM_SR_GENPLL5_RAID_AE_CLK genpll6 crystal 0 BCM_SR_GENPLL6 - 48_usb genpll6 1 BCM_SR_GENPLL6_48_USB_CLK + clk_48_usb genpll6 1 BCM_SR_GENPLL6_48_USB_CLK lcpll0 crystal 0 BCM_SR_LCPLL0 clk_sata_refp lcpll0 1 BCM_SR_LCPLL0_SATA_REFP_CLK clk_sata_refn lcpll0 2 BCM_SR_LCPLL0_SATA_REFN_CLK - clk_usb_ref lcpll0 3 BCM_SR_LCPLL0_USB_REF_CLK - sata_refpn lcpll0 3 BCM_SR_LCPLL0_SATA_REFPN_CLK + clk_sata_350 lcpll0 3 BCM_SR_LCPLL0_SATA_350_CLK + clk_sata_500 lcpll0 4 BCM_SR_LCPLL0_SATA_500_CLK lcpll1 crystal 0 BCM_SR_LCPLL1 - wan lcpll1 1 BCM_SR_LCPLL0_WAN_CLK + clk_wan lcpll1 1 BCM_SR_LCPLL1_WAN_CLK + clk_usb_ref lcpll1 2 BCM_SR_LCPLL1_USB_REF_CLK + clk_crmu_ts lcpll1 3 BCM_SR_LCPLL1_CRMU_TS_CLK lcpll_pcie crystal 0 BCM_SR_LCPLL_PCIE - pcie_phy_ref lcpll1 1 BCM_SR_LCPLL_PCIE_PHY_REF_CLK + clk_pcie_phy_ref lcpll1 1 BCM_SR_LCPLL_PCIE_PHY_REF_CLK