| Message ID | 1527775435-5017-1-git-send-email-mike.looijmans@topic.nl (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Headers | show |
Quoting Mike Looijmans (2018-05-31 07:03:55) > The si544 driver had a rounding problem that using the result of clk_round_rate > may set the clock to yet another rate, for example: > clk_round_rate(195000000) = 194999999 > clk_round_rate(194999999) = 194999998 > > Clients would expect that after clk_set_rate(clk, freq2=clk_round_rate(clk, freq)) the > chip will be running at exactly freq2. > > The problem was in the calculation of the feedback divider, it was always rounded > down instead of to the nearest possible VCO value. > > After this change, the following holds true for any supported frequency: > actual_freq = clk_round_rate(clk, freq); > clk_set_rate(clk, actual_freq); > clk_round_rate(clk, actual_freq) == actual_freq && clk_get_rate(clk) == actual_freq > > Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Any fixes tag? I can slap Fixes: 953cc3e81170 ("clk: Add driver for the si544 clock generator chip") on to the patch here. -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 31-05-18 17:34, Stephen Boyd wrote: > Quoting Mike Looijmans (2018-05-31 07:03:55) >> The si544 driver had a rounding problem that using the result of clk_round_rate >> may set the clock to yet another rate, for example: >> clk_round_rate(195000000) = 194999999 >> clk_round_rate(194999999) = 194999998 >> >> Clients would expect that after clk_set_rate(clk, freq2=clk_round_rate(clk, freq)) the >> chip will be running at exactly freq2. >> >> The problem was in the calculation of the feedback divider, it was always rounded >> down instead of to the nearest possible VCO value. >> >> After this change, the following holds true for any supported frequency: >> actual_freq = clk_round_rate(clk, freq); >> clk_set_rate(clk, actual_freq); >> clk_round_rate(clk, actual_freq) == actual_freq && clk_get_rate(clk) == actual_freq >> >> Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> > > Any fixes tag? I can slap > > Fixes: 953cc3e81170 ("clk: Add driver for the si544 clock generator chip") > > on to the patch here. > I think that would be good, yes. Slap it on. Kind regards, Mike Looijmans System Expert TOPIC Products Materiaalweg 4, NL-5681 RJ Best Postbus 440, NL-5680 AK Best Telefoon: +31 (0) 499 33 69 79 E-mail: mike.looijmans@topicproducts.com Website: www.topicproducts.com Please consider the environment before printing this e-mail -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Quoting Mike Looijmans (2018-05-31 07:03:55) > The si544 driver had a rounding problem that using the result of clk_round_rate > may set the clock to yet another rate, for example: > clk_round_rate(195000000) = 194999999 > clk_round_rate(194999999) = 194999998 > > Clients would expect that after clk_set_rate(clk, freq2=clk_round_rate(clk, freq)) the > chip will be running at exactly freq2. > > The problem was in the calculation of the feedback divider, it was always rounded > down instead of to the nearest possible VCO value. > > After this change, the following holds true for any supported frequency: > actual_freq = clk_round_rate(clk, freq); > clk_set_rate(clk, actual_freq); > clk_round_rate(clk, actual_freq) == actual_freq && clk_get_rate(clk) == actual_freq > > Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> > --- Applied to clk-next -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/clk/clk-si544.c b/drivers/clk/clk-si544.c index d437722..e972ffb 100644 --- a/drivers/clk/clk-si544.c +++ b/drivers/clk/clk-si544.c @@ -207,6 +207,7 @@ static int si544_calc_muldiv(struct clk_si544_muldiv *settings, /* And the fractional bits using the remainder */ vco = (u64)tmp << 32; + vco += FXO / 2; /* Round to nearest multiple */ do_div(vco, FXO); settings->fb_div_frac = vco;
The si544 driver had a rounding problem that using the result of clk_round_rate may set the clock to yet another rate, for example: clk_round_rate(195000000) = 194999999 clk_round_rate(194999999) = 194999998 Clients would expect that after clk_set_rate(clk, freq2=clk_round_rate(clk, freq)) the chip will be running at exactly freq2. The problem was in the calculation of the feedback divider, it was always rounded down instead of to the nearest possible VCO value. After this change, the following holds true for any supported frequency: actual_freq = clk_round_rate(clk, freq); clk_set_rate(clk, actual_freq); clk_round_rate(clk, actual_freq) == actual_freq && clk_get_rate(clk) == actual_freq Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> --- drivers/clk/clk-si544.c | 1 + 1 file changed, 1 insertion(+)