From patchwork Thu Nov 15 08:56:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dong Aisheng X-Patchwork-Id: 10683815 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 480CC14BA for ; Thu, 15 Nov 2018 08:56:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 363C1299C2 for ; Thu, 15 Nov 2018 08:56:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 29DCC2B678; Thu, 15 Nov 2018 08:56:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,UPPERCASE_50_75 autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 91C99299C2 for ; Thu, 15 Nov 2018 08:56:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728824AbeKOTDV (ORCPT ); Thu, 15 Nov 2018 14:03:21 -0500 Received: from mail-eopbgr140059.outbound.protection.outlook.com ([40.107.14.59]:2183 "EHLO EUR01-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728699AbeKOTDV (ORCPT ); Thu, 15 Nov 2018 14:03:21 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=0nuTHlj4axKROMc5P087EtXTbh0J9c55b6rJD36VOZk=; b=JvMOr3uOInjto2Wr90V2jl0VoriDWwto0XtpHveClSpHHrYPSJU0uHQfIQcyFEzKaEpaRFMaR7lwsqVLln6drmtNXIAW+N0PU09ORddQYFvs1V5nlLOprW7Zlx80HMkH2PzBPlBuXe+VpuURhOXugRs5ZpLR56+voY0mkZlzaVQ= Received: from AM0PR04MB4211.eurprd04.prod.outlook.com (52.134.126.21) by AM0PR04MB4068.eurprd04.prod.outlook.com (52.134.125.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.26; Thu, 15 Nov 2018 08:56:23 +0000 Received: from AM0PR04MB4211.eurprd04.prod.outlook.com ([fe80::797a:f972:9281:6d10]) by AM0PR04MB4211.eurprd04.prod.outlook.com ([fe80::797a:f972:9281:6d10%2]) with mapi id 15.20.1294.045; Thu, 15 Nov 2018 08:56:23 +0000 From: "A.s. Dong" To: "linux-clk@vger.kernel.org" CC: "linux-arm-kernel@lists.infradead.org" , "sboyd@kernel.org" , "mturquette@baylibre.com" , "shawnguo@kernel.org" , Fabio Estevam , dl-linux-imx , "kernel@pengutronix.de" , "A.s. Dong" , "devicetree@vger.kernel.org" Subject: [PATCH V7 3/7] dt-bindings: clock: imx8qxp: add SCU clock IDs Thread-Topic: [PATCH V7 3/7] dt-bindings: clock: imx8qxp: add SCU clock IDs Thread-Index: AQHUfMEVYBFKvlUjRE+xcrs4kLy3mA== Date: Thu, 15 Nov 2018 08:56:23 +0000 Message-ID: <1542271869-18600-4-git-send-email-aisheng.dong@nxp.com> References: <1542271869-18600-1-git-send-email-aisheng.dong@nxp.com> In-Reply-To: <1542271869-18600-1-git-send-email-aisheng.dong@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK0PR03CA0010.apcprd03.prod.outlook.com (2603:1096:203:2e::22) To AM0PR04MB4211.eurprd04.prod.outlook.com (2603:10a6:208:66::21) authentication-results: spf=none (sender IP is ) smtp.mailfrom=aisheng.dong@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.66] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;AM0PR04MB4068;6:dH31eWS3zPVYiL38bMIovGktiZNLwl+bVvrEfAtDYDO1cLdB6eVTPbrfHr50MpS8IwMVEY53AJagKzMox/+bVEW2vu48DuB+eNbXsHOGZo/x+tCxfZ8lUN3j/l87k6UHDIkr4/NncE/oni2pqrKhNnxDv+stcHjSxJLAuQbyhoR6YRov/pFphkho5s25+DT9l3Qx2r4E6Yxe3WEqDmI9tkv5PV1uNRrwAAWwp8R+tYeyIg1VrCjR/ty6/b2BQ2lRRdzgjhGtXrJLu1A7n05CHXV3sRviPOrf5DHsM/smO+VEMEr5f+cfDDdHHKAmwhajkVw0WIPbDNLewY0covL1wOQwUc6X7xr3+tOEyfRlemk7D+lsOsFhcfy6FTM+dTNYq9P2rP7apZH/VKgEw65KWHxx4rnqr6o68GCefA90FwZxymifV77OLktvHgkU1aZo5WGefaaD65wfnnZ4Qidsyg==;5:fhOSFVV4xjDpqZDiPnp56wi2od4AlgYUpGCdAnzEacmkyyupMrp0vHuyDC3tnd3OdXgSGA22UKRy26Ko3IY/OFZIUecHHBoZF+KeAAEoV3oEpuunEXnURzybAbPdJP/uB9gMxWHPwc6x2saFPotM76Nc06fv3pSr84CDQIE+A0A=;7:5JfW++Oblep+aUcBVGPcdNAMCNtsrivH8VdMwLqli57NnuKz9iQs+MphoGOB2BksTt7AxvB+cst5gGfL4qxrtjuACOmxJ2AwL9Dl3cjXUSpqfWO35bOrjnItmnSmEI7/Qp6zs+TtIO9WUlsa6AC4Sg== x-ms-office365-filtering-correlation-id: 949863bd-b29d-461e-5a01-08d64ad837d8 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390098)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:AM0PR04MB4068; x-ms-traffictypediagnostic: AM0PR04MB4068: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(9452136761055)(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(10201501046)(3231415)(944501410)(52105112)(93006095)(93001095)(6055026)(148016)(149066)(150057)(6041310)(20161123560045)(20161123564045)(20161123558120)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123562045)(201708071742011)(7699051)(76991095);SRVR:AM0PR04MB4068;BCL:0;PCL:0;RULEID:;SRVR:AM0PR04MB4068; x-forefront-prvs: 08572BD77F x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(346002)(396003)(376002)(39860400002)(366004)(136003)(199004)(189003)(102836004)(4326008)(5640700003)(316002)(54906003)(8676002)(53936002)(25786009)(81166006)(50226002)(81156014)(8936002)(106356001)(86362001)(6436002)(6512007)(186003)(6916009)(36756003)(76176011)(99286004)(97736004)(386003)(2900100001)(105586002)(26005)(2351001)(52116002)(6506007)(2906002)(256004)(2501003)(478600001)(5660300001)(3846002)(66066001)(6116002)(14444005)(68736007)(71190400001)(71200400001)(476003)(305945005)(2616005)(7736002)(6486002)(14454004)(486006)(446003)(11346002)(32563001);DIR:OUT;SFP:1101;SCL:1;SRVR:AM0PR04MB4068;H:AM0PR04MB4211.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: Surmet7SrliYd9QDwDS2hB29EbGJOzBROAMgNnGKTtxuchNw4im0UbbJM92RjiiQ5rvgIkcgqzCI7Wa2W5lYA8kpF4FvE+koq6PWYxnDjHZMUVoWSZzBf459a4wfiKio9O1nSPU3ihtzgxg3Q2XtTKTqMP2KJpC1s8ByZMFH2kaZXsBYwIqE53ykSTJRz6DiUalKQse/7lvzgRyE0IO+gWLz0o1JbiQxIrXw1KN60cM2bBZrbukPW/WZD3xiBlm7nbhlHzHhhpvtO24oq1yTjZ7ARRK3SCCI4WDUcoftgdt4CC5vEkauQSVpkfli/Vs/b1ssUY3Gke/uuBvJEmgk0UU4cG0ZuLiUvD1HSPq/vTA= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 949863bd-b29d-461e-5a01-08d64ad837d8 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Nov 2018 08:56:23.2252 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB4068 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add IMX8QXP SCU clock IDs. Cc: Stephen Boyd Cc: Shawn Guo Cc: Sascha Hauer Cc: devicetree@vger.kernel.org Cc: linux-clk@vger.kernel.org Reviewed-by: Rob Herring Signed-off-by: Dong Aisheng --- v6: new patch, separate from driver changes to avoid a checkpatch warning IDs are changed a lot due to SCU divider/gate/mux are merged into one general SCU clock and LPCG clocks are moved out. --- include/dt-bindings/clock/imx8qxp-clock.h | 136 ++++++++++++++++++++++++++++++ 1 file changed, 136 insertions(+) create mode 100644 include/dt-bindings/clock/imx8qxp-clock.h diff --git a/include/dt-bindings/clock/imx8qxp-clock.h b/include/dt-bindings/clock/imx8qxp-clock.h new file mode 100644 index 0000000..d72a39c --- /dev/null +++ b/include/dt-bindings/clock/imx8qxp-clock.h @@ -0,0 +1,136 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + * Dong Aisheng + */ + +#ifndef __DT_BINDINGS_CLOCK_IMX8QXP_H +#define __DT_BINDINGS_CLOCK_IMX8QXP_H + +/* SCU Clocks */ + +#define IMX8QXP_CLK_DUMMY 0 + +/* CPU */ +#define IMX8QXP_A35_CLK 1 + +/* LSIO SS */ +#define IMX8QXP_LSIO_MEM_CLK 2 +#define IMX8QXP_LSIO_BUS_CLK 3 +#define IMX8QXP_LSIO_PWM0_CLK 10 +#define IMX8QXP_LSIO_PWM1_CLK 11 +#define IMX8QXP_LSIO_PWM2_CLK 12 +#define IMX8QXP_LSIO_PWM3_CLK 13 +#define IMX8QXP_LSIO_PWM4_CLK 14 +#define IMX8QXP_LSIO_PWM5_CLK 15 +#define IMX8QXP_LSIO_PWM6_CLK 16 +#define IMX8QXP_LSIO_PWM7_CLK 17 +#define IMX8QXP_LSIO_GPT0_CLK 18 +#define IMX8QXP_LSIO_GPT1_CLK 19 +#define IMX8QXP_LSIO_GPT2_CLK 20 +#define IMX8QXP_LSIO_GPT3_CLK 21 +#define IMX8QXP_LSIO_GPT4_CLK 22 +#define IMX8QXP_LSIO_FSPI0_CLK 23 +#define IMX8QXP_LSIO_FSPI1_CLK 24 + +/* Connectivity SS */ +#define IMX8QXP_CONN_AXI_CLK_ROOT 30 +#define IMX8QXP_CONN_AHB_CLK_ROOT 31 +#define IMX8QXP_CONN_IPG_CLK_ROOT 32 +#define IMX8QXP_CONN_SDHC0_CLK 40 +#define IMX8QXP_CONN_SDHC1_CLK 41 +#define IMX8QXP_CONN_SDHC2_CLK 42 +#define IMX8QXP_CONN_ENET0_ROOT_CLK 43 +#define IMX8QXP_CONN_ENET0_BYPASS_CLK 44 +#define IMX8QXP_CONN_ENET0_RGMII_CLK 45 +#define IMX8QXP_CONN_ENET1_ROOT_CLK 46 +#define IMX8QXP_CONN_ENET1_BYPASS_CLK 47 +#define IMX8QXP_CONN_ENET1_RGMII_CLK 48 +#define IMX8QXP_CONN_GPMI_BCH_IO_CLK 49 +#define IMX8QXP_CONN_GPMI_BCH_CLK 50 +#define IMX8QXP_CONN_USB2_ACLK 51 +#define IMX8QXP_CONN_USB2_BUS_CLK 52 +#define IMX8QXP_CONN_USB2_LPM_CLK 53 + +/* HSIO SS */ +#define IMX8QXP_HSIO_AXI_CLK 60 +#define IMX8QXP_HSIO_PER_CLK 61 + +/* Display controller SS */ +#define IMX8QXP_DC_AXI_EXT_CLK 70 +#define IMX8QXP_DC_AXI_INT_CLK 71 +#define IMX8QXP_DC_CFG_CLK 72 +#define IMX8QXP_DC0_PLL0_CLK 80 +#define IMX8QXP_DC0_PLL1_CLK 81 +#define IMX8QXP_DC0_DISP0_CLK 82 +#define IMX8QXP_DC0_DISP1_CLK 83 + +/* MIPI-LVDS SS */ +#define IMX8QXP_MIPI_IPG_CLK 90 +#define IMX8QXP_MIPI0_PIXEL_CLK 100 +#define IMX8QXP_MIPI0_BYPASS_CLK 101 +#define IMX8QXP_MIPI0_LVDS_PIXEL_CLK 102 +#define IMX8QXP_MIPI0_LVDS_BYPASS_CLK 103 +#define IMX8QXP_MIPI0_LVDS_PHY_CLK 104 +#define IMX8QXP_MIPI0_I2C0_CLK 105 +#define IMX8QXP_MIPI0_I2C1_CLK 106 +#define IMX8QXP_MIPI0_PWM0_CLK 107 +#define IMX8QXP_MIPI1_PIXEL_CLK 108 +#define IMX8QXP_MIPI1_BYPASS_CLK 109 +#define IMX8QXP_MIPI1_LVDS_PIXEL_CLK 110 +#define IMX8QXP_MIPI1_LVDS_BYPASS_CLK 111 +#define IMX8QXP_MIPI1_LVDS_PHY_CLK 112 +#define IMX8QXP_MIPI1_I2C0_CLK 113 +#define IMX8QXP_MIPI1_I2C1_CLK 114 +#define IMX8QXP_MIPI1_PWM0_CLK 115 + +/* IMG SS */ +#define IMX8QXP_IMG_AXI_CLK 120 +#define IMX8QXP_IMG_IPG_CLK 121 +#define IMX8QXP_IMG_PXL_CLK 122 + +/* MIPI-CSI SS */ +#define IMX8QXP_CSI0_CORE_CLK 130 +#define IMX8QXP_CSI0_ESC_CLK 131 +#define IMX8QXP_CSI0_PWM0_CLK 132 +#define IMX8QXP_CSI0_I2C0_CLK 133 + +/* PARALLER CSI SS */ +#define IMX8QXP_PARALLEL_CSI_DPLL_CLK 140 +#define IMX8QXP_PARALLEL_CSI_PIXEL_CLK 141 +#define IMX8QXP_PARALLEL_CSI_MCLK_CLK 142 + +/* VPU SS */ +#define IMX8QXP_VPU_ENC_CLK 150 +#define IMX8QXP_VPU_DEC_CLK 151 + +/* GPU SS */ +#define IMX8QXP_GPU0_CORE_CLK 160 +#define IMX8QXP_GPU0_SHADER_CLK 161 + +/* ADMA SS */ +#define IMX8QXP_ADMA_IPG_CLK_ROOT 165 +#define IMX8QXP_ADMA_UART0_CLK 170 +#define IMX8QXP_ADMA_UART1_CLK 171 +#define IMX8QXP_ADMA_UART2_CLK 172 +#define IMX8QXP_ADMA_UART3_CLK 173 +#define IMX8QXP_ADMA_SPI0_CLK 174 +#define IMX8QXP_ADMA_SPI1_CLK 175 +#define IMX8QXP_ADMA_SPI2_CLK 176 +#define IMX8QXP_ADMA_SPI3_CLK 177 +#define IMX8QXP_ADMA_CAN0_CLK 178 +#define IMX8QXP_ADMA_CAN1_CLK 179 +#define IMX8QXP_ADMA_CAN2_CLK 180 +#define IMX8QXP_ADMA_I2C0_CLK 181 +#define IMX8QXP_ADMA_I2C1_CLK 182 +#define IMX8QXP_ADMA_I2C2_CLK 183 +#define IMX8QXP_ADMA_I2C3_CLK 184 +#define IMX8QXP_ADMA_FTM0_CLK 185 +#define IMX8QXP_ADMA_FTM1_CLK 186 +#define IMX8QXP_ADMA_ADC0_CLK 187 +#define IMX8QXP_ADMA_PWM_CLK 188 +#define IMX8QXP_ADMA_LCD_CLK 189 + +#define IMX8QXP_SCU_CLK_END 190 + +#endif /* __DT_BINDINGS_CLOCK_IMX8QXP_H */