From patchwork Mon Jun 24 03:02:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 11012053 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3200E6C5 for ; Mon, 24 Jun 2019 03:04:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 24A5A28AF8 for ; Mon, 24 Jun 2019 03:04:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 18B5128B08; Mon, 24 Jun 2019 03:04:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BF0B328AF8 for ; Mon, 24 Jun 2019 03:04:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727571AbfFXDDs (ORCPT ); Sun, 23 Jun 2019 23:03:48 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:7414 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727566AbfFXDDr (ORCPT ); Sun, 23 Jun 2019 23:03:47 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Sun, 23 Jun 2019 20:03:49 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Sun, 23 Jun 2019 20:03:47 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Sun, 23 Jun 2019 20:03:47 -0700 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 24 Jun 2019 03:03:46 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Mon, 24 Jun 2019 03:03:46 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.174.126]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Sun, 23 Jun 2019 20:03:46 -0700 From: Sowjanya Komatineni To: , , , , , , , CC: , , , , , , , , , , , , , , , Subject: [PATCH V4 15/18] arm64: tegra: enable wake from deep sleep on RTC alarm. Date: Sun, 23 Jun 2019 20:02:56 -0700 Message-ID: <1561345379-2429-16-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561345379-2429-1-git-send-email-skomatineni@nvidia.com> References: <1561345379-2429-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1561345429; bh=r/7sch8XJz5tT01ckyUKnesfNR9nppNjP97KIR+puRI=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=ER8hw4Y5X0UgQGYKZ8MtwW09ehgstjCTZw8XcoaFATByfoy441YySZTEZFyByQ6m5 vFTpE+Ymw9aw/aXXEU3pCpe7oWNKdFAorTw2mDWaYRf51pe3OlFwqu+BC6D6Eb66wb IdsEzYrmNd85zIOByOPBgFOijUFV2NwJDt5CzQGha7+xtaTRKpXjBs8HOffZdhDm/C 2V7fFbwoJqV/MQnw4xvSRZCfVGugK/IoIQcsdS3/LFE6GxwzJ52ryiFjQKfFwIWDbd Ulnd533MxGIzJSmARrrQy5CZIUkozQ1izC7gbr3JNXCmcXaGi2Oq2uBwbA20Amabh+ KaNG7sroWdTUQ== Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch updates device tree for RTC and PMC to allow system wake from deep sleep on RTC alarm. Signed-off-by: Sowjanya Komatineni --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 659753118e96..30a7c48385a2 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -768,7 +768,8 @@ rtc@7000e000 { compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc"; reg = <0x0 0x7000e000 0x0 0x100>; - interrupts = ; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&pmc>; clocks = <&tegra_car TEGRA210_CLK_RTC>; clock-names = "rtc"; }; @@ -778,6 +779,8 @@ reg = <0x0 0x7000e400 0x0 0x400>; clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; clock-names = "pclk", "clk32k_in"; + #interrupt-cells = <2>; + interrupt-controller; powergates { pd_audio: aud {