@@ -26,9 +26,16 @@
#define CLKSET0_PRIVATE BIT(0)
#define CLKSET0_EXTAL_ONLY (CLKSET0_INTCLK_EN | CLKSET0_PRIVATE)
+enum {
+ CLK_INDEX_EHCI_OHCI,
+ CLK_INDEX_HS_USB,
+ CLK_NUM
+};
+
struct usb2_clock_sel_priv {
void __iomem *base;
struct clk_hw hw;
+ struct clk_bulk_data clks[CLK_NUM];
bool extal;
bool xtal;
};
@@ -53,14 +60,25 @@ static void usb2_clock_sel_disable_extal_only(struct usb2_clock_sel_priv *priv)
static int usb2_clock_sel_enable(struct clk_hw *hw)
{
- usb2_clock_sel_enable_extal_only(to_priv(hw));
+ struct usb2_clock_sel_priv *priv = to_priv(hw);
+ int ret;
+
+ ret = clk_bulk_prepare_enable(CLK_NUM, priv->clks);
+ if (ret)
+ return ret;
+
+ usb2_clock_sel_enable_extal_only(priv);
return 0;
}
static void usb2_clock_sel_disable(struct clk_hw *hw)
{
- usb2_clock_sel_disable_extal_only(to_priv(hw));
+ struct usb2_clock_sel_priv *priv = to_priv(hw);
+
+ usb2_clock_sel_disable_extal_only(priv);
+
+ clk_bulk_disable_unprepare(CLK_NUM, priv->clks);
}
/*
@@ -128,6 +146,14 @@ static int rcar_usb2_clock_sel_probe(struct platform_device *pdev)
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);
+ priv->clks[CLK_INDEX_EHCI_OHCI].clk = devm_clk_get(dev, "ehci_ohci");
+ if (IS_ERR(priv->clks[CLK_INDEX_EHCI_OHCI].clk))
+ return PTR_ERR(priv->clks[CLK_INDEX_EHCI_OHCI].clk);
+
+ priv->clks[CLK_INDEX_HS_USB].clk = devm_clk_get(dev, "hs-usb-if");
+ if (IS_ERR(priv->clks[CLK_INDEX_HS_USB].clk))
+ return PTR_ERR(priv->clks[CLK_INDEX_HS_USB].clk);
+
pm_runtime_enable(dev);
pm_runtime_get_sync(dev);
This hardware needs to enable clocks of both host and peripheral. So, this patch adds multiple clocks management. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> --- drivers/clk/renesas/rcar-usb2-clock-sel.c | 30 ++++++++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-)