From patchwork Tue Jan 14 07:24:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 11331429 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 261C2139A for ; Tue, 14 Jan 2020 07:25:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 04D242465B for ; Tue, 14 Jan 2020 07:25:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="pyPs4BIb" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728871AbgANHZu (ORCPT ); Tue, 14 Jan 2020 02:25:50 -0500 Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:13884 "EHLO hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728993AbgANHYi (ORCPT ); Tue, 14 Jan 2020 02:24:38 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 13 Jan 2020 23:24:18 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 13 Jan 2020 23:24:38 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 13 Jan 2020 23:24:38 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 14 Jan 2020 07:24:37 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Tue, 14 Jan 2020 07:24:37 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.169.242]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Mon, 13 Jan 2020 23:24:37 -0800 From: Sowjanya Komatineni To: , , , , , , , , , , , , CC: , , , , , , , , , , Subject: [PATCH v8 11/22] ASoC: tegra: Add fallback implementation for audio mclk Date: Mon, 13 Jan 2020 23:24:16 -0800 Message-ID: <1578986667-16041-12-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1578986667-16041-1-git-send-email-skomatineni@nvidia.com> References: <1578986667-16041-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1578986658; bh=VIAVqKegLCz30ikMaiq3GK4scDod4shzi8/tBnou6Qo=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=pyPs4BIbu2fW/nI8eek0kwRoqtA5Uidngga+CFt7gD8NbauQv9BVrnxpM6fcFow0q 0AdYCIOmXWah/c2ii77yHeul6KJ9IB8Kw3W6onF2MQQnS9quOKqAjH1g8N33a86YGp /BKuDJrylBDKrVEi8zr2Lw1QKyByO/15OPPOhaTlWW6znKZWPJhzVqQcUWGUPUDJkb /rCJGT8oCdLpNhDjB0YIx0IoedEb0VzV8CU0mQELI+YmJqQe8B4GWqMpXjOh0OoMFk zmr+jvb28uaF5cFMho4tk0n9jpDCkaqlw77BghVFXVcT0TR3d5RLKsCdlpV6VtkfXh 8njyKrJRcpyJA== Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org mclk is from clk_out_1 which is part of Tegra PMC block and pmc clocks are moved to Tegra PMC driver with pmc as clock provider and using pmc clock ids. New device tree uses clk_out_1 from pmc clock provider as audio mclk. So, this patch adds implementation for mclk fallback to extern1 when retrieving mclk returns -ENOENT to be backward compatible of new device tree with older kernels. Fixes: 110147c8c513 ("ASoC: tegra: always use clk_get() in utility code") Tested-by: Dmitry Osipenko Reviewed-by: Dmitry Osipenko Signed-off-by: Sowjanya Komatineni Acked-by: Thierry Reding --- sound/soc/tegra/tegra_asoc_utils.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/sound/soc/tegra/tegra_asoc_utils.c b/sound/soc/tegra/tegra_asoc_utils.c index 536a578e9512..74d3ffe7e603 100644 --- a/sound/soc/tegra/tegra_asoc_utils.c +++ b/sound/soc/tegra/tegra_asoc_utils.c @@ -191,9 +191,21 @@ int tegra_asoc_utils_init(struct tegra_asoc_utils_data *data, data->clk_cdev1 = clk_get(dev, "mclk"); if (IS_ERR(data->clk_cdev1)) { - dev_err(data->dev, "Can't retrieve clk cdev1\n"); - ret = PTR_ERR(data->clk_cdev1); - goto err_put_pll_a_out0; + if (PTR_ERR(data->clk_cdev1) != -ENOENT) { + dev_err(data->dev, "Can't retrieve clk cdev1\n"); + ret = PTR_ERR(data->clk_cdev1); + goto err_put_pll_a_out0; + } + + /* Fall back to extern1 */ + data->clk_cdev1 = clk_get(dev, "extern1"); + if (IS_ERR(data->clk_cdev1)) { + dev_err(data->dev, "Can't retrieve clk extern1\n"); + ret = PTR_ERR(data->clk_cdev1); + goto err_put_pll_a_out0; + } + + dev_info(data->dev, "Falling back to extern1\n"); } ret = tegra_asoc_utils_set_rate(data, 44100, 256 * 44100);