From patchwork Fri Feb 21 10:12:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 11396031 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AA0C117F0 for ; Fri, 21 Feb 2020 10:12:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 894B620722 for ; Fri, 21 Feb 2020 10:12:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="l4nBRRhC" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728620AbgBUKMi (ORCPT ); Fri, 21 Feb 2020 05:12:38 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:9240 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1728396AbgBUKMi (ORCPT ); Fri, 21 Feb 2020 05:12:38 -0500 X-UUID: 2fec0106058b4108b7102098fe56fd44-20200221 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=ARXJmjqMj0hTx5/WyykP1t7usiaCNGTpnwPDf5OrFYI=; b=l4nBRRhCOPOQWMinALq2q2u300Ha+r+ovp6y5rwObVBXbach3VOHcd6BxfQjnrM8JR/Lj9AsdA5BQ6K1D9V57Cc4GlJpFDF3Rp69scv/ANazREZQsbErpr5PJGAJ1nbjKSMT0RwjMTOMNtDybbdHvo9DgfDgsDqnzUvQCoyH1ng=; X-UUID: 2fec0106058b4108b7102098fe56fd44-20200221 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1465237031; Fri, 21 Feb 2020 18:12:32 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 21 Feb 2020 18:09:42 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 21 Feb 2020 18:11:53 +0800 From: Macpaul Lin To: Rob Herring , Mark Rutland , Matthias Brugger , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , mtk01761 , Fabien Parent , Weiyi Lu , Mars Cheng , Sean Wang , Macpaul Lin , Owen Chen , Chunfeng Yun , Evan Green , Yong Wu , Joerg Roedel , Shawn Guo , Marc Zyngier , Ryder Lee , , , , , CC: Mediatek WSD Upstream , CC Hwang , Loda Chou Subject: [PATCH v8 4/4] arm64: defconfig: add CONFIG_COMMON_CLK_MT6765_XXX clocks Date: Fri, 21 Feb 2020 18:12:09 +0800 Message-ID: <1582279929-11535-5-git-send-email-macpaul.lin@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1582279929-11535-1-git-send-email-macpaul.lin@mediatek.com> References: <1582279929-11535-1-git-send-email-macpaul.lin@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: C739C5E12C447902CF866A1404BB87A25E2BD863623992A5BE480521300D28D92000:8 X-MTK: N Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Owen Chen Enable MT6765 clock configs, include topckgen, apmixedsys, infracfg, and subsystem clocks. Signed-off-by: Owen Chen Signed-off-by: Macpaul Lin --- arch/arm64/configs/defconfig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 6a83ba2..9d3da81 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -489,6 +489,12 @@ CONFIG_REGULATOR_QCOM_SMD_RPM=y CONFIG_REGULATOR_QCOM_SPMI=y CONFIG_REGULATOR_RK808=y CONFIG_REGULATOR_S2MPS11=y +CONFIG_COMMON_CLK_MT6765_AUDIOSYS=y +CONFIG_COMMON_CLK_MT6765_CAMSYS=y +CONFIG_COMMON_CLK_MT6765_MMSYS=y +CONFIG_COMMON_CLK_MT6765_IMGSYS=y +CONFIG_COMMON_CLK_MT6765_VCODECSYS=y +CONFIG_COMMON_CLK_MT6765_MIPI0ASYS=y CONFIG_REGULATOR_VCTRL=m CONFIG_RC_CORE=m CONFIG_RC_DECODERS=y