| Message ID | 1640018638-19436-2-git-send-email-tdas@codeaurora.org (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | Add support for LPASS Core and Audio Clock for SC7280 | expand |
Quoting Taniya Das (2021-12-20 08:43:54) > PLL poll for lock detection can take more than 100us for certain type > of Lucid PLLs and also the new PLLs types(Lucid EVO), thus update to 200us. > > Signed-off-by: Taniya Das <tdas@codeaurora.org> > --- Any Fixes tag?
Quoting Taniya Das (2021-12-20 08:43:54) > PLL poll for lock detection can take more than 100us for certain type > of Lucid PLLs and also the new PLLs types(Lucid EVO), thus update to 200us. > > Signed-off-by: Taniya Das <tdas@codeaurora.org> > --- Applied to clk-next
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index 0bbfc4d..4406cf6 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -223,7 +223,7 @@ static int wait_for_pll(struct clk_alpha_pll *pll, u32 mask, bool inverse, if (ret) return ret; - for (count = 100; count > 0; count--) { + for (count = 200; count > 0; count--) { ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); if (ret) return ret;
PLL poll for lock detection can take more than 100us for certain type of Lucid PLLs and also the new PLLs types(Lucid EVO), thus update to 200us. Signed-off-by: Taniya Das <tdas@codeaurora.org> --- drivers/clk/qcom/clk-alpha-pll.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.