clk: xgene: use div64_u64() instead of do_div()

Commit Message

王擎 Feb. 9, 2022, 8:35 a.m. UTC

From: Wang Qing <[e-mail]>

do_div() does a 64-by-32 division.
When the divisor is u64, do_div() truncates it to 32 bits, this means it
can test non-zero and be truncated to zero for division.

fix do_div.cocci warning:
do_div() does a 64-by-32 division, please consider using div64_u64 instead.

Signed-off-by: Wang Qing <[e-mail]>
---
 drivers/clk/clk-xgene.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Patch

diff --git a/drivers/clk/clk-xgene.c b/drivers/clk/clk-xgene.c
index 857217c..6c40821
--- a/drivers/clk/clk-xgene.c
+++ b/drivers/clk/clk-xgene.c
@@ -262,7 +262,7 @@  static unsigned long xgene_clk_pmd_recalc_rate(struct clk_hw *hw,
 		scale++;
 
 	/* freq = parent_rate * scaler / denom */
-	do_div(ret, fd->denom);
+	div64_u64(ret, fd->denom);
 	ret *= scale;
 	if (ret == 0)
 		ret = (u64)parent_rate;
@@ -284,7 +284,7 @@  static long xgene_clk_pmd_round_rate(struct clk_hw *hw, unsigned long rate,
 	scale = DIV_ROUND_UP_ULL(ret, *parent_rate);
 
 	ret = (u64)*parent_rate * scale;
-	do_div(ret, fd->denom);
+	div64_u64(ret, fd->denom);
 
 	return ret;
 }