From patchwork Wed Jan 4 13:29:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 13088581 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0BAEC54EF1 for ; Wed, 4 Jan 2023 13:32:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231130AbjADNcK (ORCPT ); Wed, 4 Jan 2023 08:32:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34802 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234317AbjADNbe (ORCPT ); Wed, 4 Jan 2023 08:31:34 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE5869FE4; Wed, 4 Jan 2023 05:29:48 -0800 (PST) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 304DR3Ux025991; Wed, 4 Jan 2023 13:29:43 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=nLEGtR3xX/fAobQiHP8Fq1vCYtn2NPDHBpPXNLpRiNE=; b=KqgPpy1OF5gG9VsRl1unLXEda0gwMTDwhfKSj52l+9F1uDhAXAASWJUcxJtlEww5exb0 1f2XpPPWQ4JuWyhumXjxNkJbMxbcno3gvNpD9RaFYSRjwOMbuWKVyHax548HAE3O2bn8 EyGWPVqjxqJd3HHpIzcPVaGNfTif1LgKh6U/+lzRx9++rkY4I5B9LO/+xJnmXEoelXEh E7c7JEdYcT6OP8F8TB7dE265gK99BlQfOibsKIGVdhzSpTrym0Jn59ZoNmRP/QiOnliE QZX6vKkvsNwXwQZ+4ecaH7Mau13QQMF+RKY4xccMeHmFpKriYbr4Dls/rcEX+INh5vIQ ow== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3mvsvut026-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Jan 2023 13:29:42 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 304DTfwV003080 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Jan 2023 13:29:41 GMT Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 4 Jan 2023 05:29:36 -0800 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [PATCH v3 2/4] dt-bindings: clock: qcom,sc7280-lpasscc: Add resets for audioreach Date: Wed, 4 Jan 2023 18:59:13 +0530 Message-ID: <1672838955-7759-3-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1672838955-7759-1-git-send-email-quic_srivasam@quicinc.com> References: <1672838955-7759-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: QSrLZfOPR4vLHSEzGmnBKPfxh4rSw3sl X-Proofpoint-ORIG-GUID: QSrLZfOPR4vLHSEzGmnBKPfxh4rSw3sl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2023-01-04_06,2023-01-04_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 impostorscore=0 spamscore=0 suspectscore=0 bulkscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301040113 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks for audioreach based SC7280 platforms. Signed-off-by: Srinivasa Rao Mandadapu Tested-by: Mohammad Rafi Shaik --- .../devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml index 97c6bd9..054c496 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml @@ -31,15 +31,20 @@ properties: '#clock-cells': const: 1 + '#reset-cells': + const: 1 + reg: items: - description: LPASS qdsp6ss register - description: LPASS top-cc register + - description: LPASS reset-cgcr register reg-names: items: - const: qdsp6ss - const: top_cc + - const: reset_cgcr qcom,adsp-pil-mode: description: @@ -62,11 +67,14 @@ examples: #include clock-controller@3000000 { compatible = "qcom,sc7280-lpasscc"; - reg = <0x03000000 0x40>, <0x03c04000 0x4>; - reg-names = "qdsp6ss", "top_cc"; + reg = <0x03000000 0x40>, + <0x03c04000 0x4>, + <0x032a9000 0x1000>; + reg-names = "qdsp6ss", "top_cc", "reset_cgcr"; clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "iface"; qcom,adsp-pil-mode; #clock-cells = <1>; + #reset-cells = <1>; }; ...