Message ID | 1672849297-3116-4-git-send-email-quic_srivasam@quicinc.com (mailing list archive) |
---|---|
State | Awaiting Upstream, archived |
Headers | show |
Series | Add resets for ADSP based audio clock controller driver | expand |
Quoting Srinivasa Rao Mandadapu (2023-01-04 08:21:36) > The qdsp6ss memory region is being shared by ADSP remoteproc device and > lpasscc clock device, hence causing memory conflict. > As the qdsp6ss clocks are being enabled in remoteproc driver, skip qdsp6ss > clock registration if "qcom,adsp-pil-mode" is enabled. > > Fixes: 4ab43d171181 ("clk: qcom: Add lpass clock controller driver for SC7280") > No newline here. > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> > --- Reviewed-by: Stephen Boyd <swboyd@chromium.org>
diff --git a/drivers/clk/qcom/lpasscc-sc7280.c b/drivers/clk/qcom/lpasscc-sc7280.c index 5c1e17b..85dd5b9 100644 --- a/drivers/clk/qcom/lpasscc-sc7280.c +++ b/drivers/clk/qcom/lpasscc-sc7280.c @@ -118,12 +118,14 @@ static int lpass_cc_sc7280_probe(struct platform_device *pdev) goto destroy_pm_clk; } - lpass_regmap_config.name = "qdsp6ss"; - desc = &lpass_qdsp6ss_sc7280_desc; + if (!of_property_read_bool(pdev->dev.of_node, "qcom,adsp-pil-mode")) { + lpass_regmap_config.name = "qdsp6ss"; + desc = &lpass_qdsp6ss_sc7280_desc; - ret = qcom_cc_probe_by_index(pdev, 0, desc); - if (ret) - goto destroy_pm_clk; + ret = qcom_cc_probe_by_index(pdev, 0, desc); + if (ret) + goto destroy_pm_clk; + } lpass_regmap_config.name = "top_cc"; desc = &lpass_cc_top_sc7280_desc;