Message ID | 1674322340-25882-5-git-send-email-quic_srivasam@quicinc.com (mailing list archive) |
---|---|
State | Superseded, archived |
Headers | show |
Series | Add resets for ADSP based audio clock controller driver | expand |
diff --git a/drivers/clk/qcom/lpasscorecc-sc7280.c b/drivers/clk/qcom/lpasscorecc-sc7280.c index 6ad19b0..3aa16d8 100644 --- a/drivers/clk/qcom/lpasscorecc-sc7280.c +++ b/drivers/clk/qcom/lpasscorecc-sc7280.c @@ -395,6 +395,9 @@ static int lpass_core_cc_sc7280_probe(struct platform_device *pdev) const struct qcom_cc_desc *desc; struct regmap *regmap; + if (of_property_read_bool(pdev->dev.of_node, "qcom,adsp-pil-mode")) + return 0; + lpass_core_cc_sc7280_regmap_config.name = "lpass_core_cc"; lpass_core_cc_sc7280_regmap_config.max_register = 0x4f004; desc = &lpass_core_cc_sc7280_desc;