| Message ID | 20160608183110.13851-4-matthew@mattleach.net (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
On 06/08/2016 08:30 PM, Matthew Leach wrote: > Use the byte-order aware big endian accessors, allowing for kernels > running under big-endian. > > Signed-off-by: Matthew Leach <matthew@mattleach.net> Patch applied, thanks. -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 7b3d0f9..35a977d 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -1375,12 +1375,12 @@ static void __init exynos4x12_core_down_clock(void) if (num_possible_cpus() == 4) tmp |= PWR_CTRL1_USE_CORE3_WFE | PWR_CTRL1_USE_CORE2_WFE | PWR_CTRL1_USE_CORE3_WFI | PWR_CTRL1_USE_CORE2_WFI; - __raw_writel(tmp, reg_base + PWR_CTRL1); + writel_relaxed(tmp, reg_base + PWR_CTRL1); /* * Disable the clock up feature in case it was enabled by bootloader. */ - __raw_writel(0x0, reg_base + E4X12_PWR_CTRL2); + writel_relaxed(0x0, reg_base + E4X12_PWR_CTRL2); } #define E4210_CPU_DIV0(apll, pclk_dbg, atb, periph, corem1, corem0) \
Use the byte-order aware big endian accessors, allowing for kernels running under big-endian. Signed-off-by: Matthew Leach <matthew@mattleach.net> --- CC: Sylwester Nawrocki <s.nawrocki@samsung.com> CC: Tomasz Figa <tomasz.figa@gmail.com> CC: Michael Turquette <mturquette@baylibre.com> CC: Stephen Boyd <sboyd@codeaurora.org> CC: Kukjin Kim <kgene@kernel.org> CC: Krzysztof Kozlowski <k.kozlowski@samsung.com> CC: linux-samsung-soc@vger.kernel.org CC: linux-clk@vger.kernel.org CC: linux-arm-kernel@lists.infradead.org CC: linux-kernel@vger.kernel.org --- drivers/clk/samsung/clk-exynos4.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)