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Tue, 28 Jun 2016 05:33:21 +0000 From: Bhuvanchandra DV To: CC: , , , , , , , , , , "Bhuvanchandra DV" Subject: [PATCH v2 4/9] tty: serial: fsl_lpuart: fix clearing of receive flag Date: Tue, 28 Jun 2016 11:02:30 +0530 Message-ID: <20160628053235.5114-5-bhuvanchandra.dv@toradex.com> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20160628053235.5114-1-bhuvanchandra.dv@toradex.com> References: <20160628053235.5114-1-bhuvanchandra.dv@toradex.com> MIME-Version: 1.0 X-Originating-IP: [115.115.243.34] X-ClientProxiedBy: BM1PR01CA0056.INDPRD01.PROD.OUTLOOK.COM (10.163.199.28) To HE1PR0501MB2089.eurprd05.prod.outlook.com (10.167.246.9) X-MS-Office365-Filtering-Correlation-Id: b24067fe-ef12-479a-f72f-08d39f15b94b X-Microsoft-Exchange-Diagnostics: 1; HE1PR0501MB2089; 2:sD+d4pI+osnnkeD9HKcwd7HYmGjNoOUL1NcAqLvrLFTdH9rpWoRCTT2RtKn9CdlE84QgdNX2+9kO0aK4xehRadsCfn5Qm73ZchSZfFNEf9ehpCeUJOxq55OAp5d0k/vbkjus6F9BoDEka7iy99/XPTEThHaU4uWzp6S8C6CRkSQBZ0u1RDDtWZNvCpoA6kEc; 3:3/C5PqZbaZIuaXL7GgS7Vm0RoJ2u4MLo6mQoFU4/JeHbCSmHMhorZm76RaxOQs/Z3dPRW2Bptn2adiB4c+PUlnvBFh/vliNaIcKIax057CxxjBOfvHkwKdLrZmiUmuxW X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:HE1PR0501MB2089; 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It turned out that even though we flush the FIFO afterwards, a explicit read of the data register is still required. This leads to a FIFO underrun. To avoid this, follow the advice in the overrun "Operation section": Unconditionally clear RXUF after using RXFLUSH. Signed-off-by: Stefan Agner Signed-off-by: Bhuvanchandra DV --- drivers/tty/serial/fsl_lpuart.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 75a2098..97c1fda 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -935,13 +935,16 @@ static void lpuart_setup_watermark(struct lpuart_port *sport) writeb(val | UARTPFIFO_TXFE | UARTPFIFO_RXFE, sport->port.membase + UARTPFIFO); - /* explicitly clear RDRF */ - readb(sport->port.membase + UARTSR1); - /* flush Tx and Rx FIFO */ writeb(UARTCFIFO_TXFLUSH | UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); + /* explicitly clear RDRF */ + if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { + readb(sport->port.membase + UARTDR); + writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); + } + writeb(0, sport->port.membase + UARTTWFIFO); writeb(1, sport->port.membase + UARTRWFIFO);