From patchwork Mon Aug 15 21:10:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 9282179 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 020866086A for ; Mon, 15 Aug 2016 21:10:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E0C3128E75 for ; Mon, 15 Aug 2016 21:10:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D529128E80; Mon, 15 Aug 2016 21:10:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 776B728E77 for ; Mon, 15 Aug 2016 21:10:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932470AbcHOVKT (ORCPT ); Mon, 15 Aug 2016 17:10:19 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:50331 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932339AbcHOVKQ (ORCPT ); Mon, 15 Aug 2016 17:10:16 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A668561CC7; Mon, 15 Aug 2016 21:10:15 +0000 (UTC) Received: from localhost (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: sboyd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id CBC2A61C85; Mon, 15 Aug 2016 21:10:14 +0000 (UTC) Date: Mon, 15 Aug 2016 14:10:14 -0700 From: Stephen Boyd To: Gregory CLEMENT Cc: Mike Turquette , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, Nadav Haklai , Victor Gu , Romain Perier , Omri Itach , Marcin Wojtas , Wilson Ding , Hua Jing , Terry Zhou Subject: Re: [PATCH v3 4/6] clk: mvebu Add the time base generator clocks for Armada 3700 Message-ID: <20160815211014.GC361@codeaurora.org> References: <1468935742-11218-1-git-send-email-gregory.clement@free-electrons.com> <1468935742-11218-5-git-send-email-gregory.clement@free-electrons.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1468935742-11218-5-git-send-email-gregory.clement@free-electrons.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 07/19, Gregory CLEMENT wrote: > These clocks are children of the xtal clock and each one can be selected > as a source for the peripheral clocks. > > According to the datasheet it should be possible to modify their rate, > but currently it is not supported. > > Signed-off-by: Gregory CLEMENT > --- Applied to clk-next + the following squashed in diff --git a/drivers/clk/mvebu/armada-37xx-tbg.c b/drivers/clk/mvebu/armada-37xx-tbg.c index 2063ba7d5cb1..aa80db11f543 100644 --- a/drivers/clk/mvebu/armada-37xx-tbg.c +++ b/drivers/clk/mvebu/armada-37xx-tbg.c @@ -46,14 +46,14 @@ struct tbg_def { u32 vcodiv_offset; }; -const struct tbg_def tbg[NUM_TBG] = { +static const struct tbg_def tbg[NUM_TBG] = { {"TBG-A-P", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL8, TBG_A_VCODIV_DIFF}, {"TBG-B-P", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL8, TBG_B_VCODIV_DIFF}, {"TBG-A-S", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL1, TBG_A_VCODIV_SE}, {"TBG-B-S", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL1, TBG_B_VCODIV_SE}, }; -unsigned int tbg_get_mult(void __iomem *reg, const struct tbg_def *ptbg) +static unsigned int tbg_get_mult(void __iomem *reg, const struct tbg_def *ptbg) { u32 val; @@ -62,7 +62,7 @@ unsigned int tbg_get_mult(void __iomem *reg, const struct tbg_def *ptbg) return ((val >> ptbg->fbdiv_offset) & TBG_DIV_MASK) << 2; } -unsigned int tbg_get_div(void __iomem *reg, const struct tbg_def *ptbg) +static unsigned int tbg_get_div(void __iomem *reg, const struct tbg_def *ptbg) { u32 val; unsigned int div; @@ -99,7 +99,7 @@ static int armada_3700_tbg_clock_probe(struct platform_device *pdev) hw_tbg_data->num = NUM_TBG; platform_set_drvdata(pdev, hw_tbg_data); - parent = devm_clk_get(dev, 0); + parent = devm_clk_get(dev, NULL); if (IS_ERR(parent)) { dev_err(dev, "Could get the clock parent\n"); return -EINVAL;