From patchwork Mon Sep 19 20:00:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 9340427 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EB68460B16 for ; Mon, 19 Sep 2016 20:00:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DC98A2983F for ; Mon, 19 Sep 2016 20:00:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D104029854; Mon, 19 Sep 2016 20:00:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 41D992984E for ; Mon, 19 Sep 2016 20:00:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932327AbcISUAX (ORCPT ); Mon, 19 Sep 2016 16:00:23 -0400 Received: from down.free-electrons.com ([37.187.137.238]:43479 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932860AbcISUAU (ORCPT ); Mon, 19 Sep 2016 16:00:20 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id D0F0B3B7; Mon, 19 Sep 2016 22:00:17 +0200 (CEST) Received: from localhost (LFbn-1-2281-83.w90-76.abo.wanadoo.fr [90.76.98.83]) by mail.free-electrons.com (Postfix) with ESMTPSA id 8BD7B3AB; Mon, 19 Sep 2016 22:00:17 +0200 (CEST) From: Maxime Ripard To: Chen-Yu Tsai , Mike Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, Maxime Ripard Subject: [PATCH] clk: sunxi-ng: Fix reset offset for the A23 and A33 Date: Mon, 19 Sep 2016 22:00:15 +0200 Message-Id: <20160919200015.23641-1-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.9.3 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There's been a copy and paste mistake in the A23 and A33 from the H3, leading in the reset offset for the UART and I2C. Signed-off-by: Maxime Ripard --- Hi Stephen, Mike, Could you apply that patch directly? Thanks! Maxime drivers/clk/sunxi-ng/ccu-sun8i-a23.c | 16 ++++++++-------- drivers/clk/sunxi-ng/ccu-sun8i-a33.c | 16 ++++++++-------- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c index 11e624ab28b1..2646d980087b 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c @@ -689,14 +689,14 @@ static struct ccu_reset_map sun8i_a23_ccu_resets[] = { [RST_BUS_I2S0] = { 0x2d0, BIT(12) }, [RST_BUS_I2S1] = { 0x2d0, BIT(13) }, - [RST_BUS_I2C0] = { 0x2d4, BIT(0) }, - [RST_BUS_I2C1] = { 0x2d4, BIT(1) }, - [RST_BUS_I2C2] = { 0x2d4, BIT(2) }, - [RST_BUS_UART0] = { 0x2d4, BIT(16) }, - [RST_BUS_UART1] = { 0x2d4, BIT(17) }, - [RST_BUS_UART2] = { 0x2d4, BIT(18) }, - [RST_BUS_UART3] = { 0x2d4, BIT(19) }, - [RST_BUS_UART4] = { 0x2d4, BIT(20) }, + [RST_BUS_I2C0] = { 0x2d8, BIT(0) }, + [RST_BUS_I2C1] = { 0x2d8, BIT(1) }, + [RST_BUS_I2C2] = { 0x2d8, BIT(2) }, + [RST_BUS_UART0] = { 0x2d8, BIT(16) }, + [RST_BUS_UART1] = { 0x2d8, BIT(17) }, + [RST_BUS_UART2] = { 0x2d8, BIT(18) }, + [RST_BUS_UART3] = { 0x2d8, BIT(19) }, + [RST_BUS_UART4] = { 0x2d8, BIT(20) }, }; static const struct sunxi_ccu_desc sun8i_a23_ccu_desc = { diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c index fc00892906d8..96b40ca57697 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c @@ -732,14 +732,14 @@ static struct ccu_reset_map sun8i_a33_ccu_resets[] = { [RST_BUS_I2S0] = { 0x2d0, BIT(12) }, [RST_BUS_I2S1] = { 0x2d0, BIT(13) }, - [RST_BUS_I2C0] = { 0x2d4, BIT(0) }, - [RST_BUS_I2C1] = { 0x2d4, BIT(1) }, - [RST_BUS_I2C2] = { 0x2d4, BIT(2) }, - [RST_BUS_UART0] = { 0x2d4, BIT(16) }, - [RST_BUS_UART1] = { 0x2d4, BIT(17) }, - [RST_BUS_UART2] = { 0x2d4, BIT(18) }, - [RST_BUS_UART3] = { 0x2d4, BIT(19) }, - [RST_BUS_UART4] = { 0x2d4, BIT(20) }, + [RST_BUS_I2C0] = { 0x2d8, BIT(0) }, + [RST_BUS_I2C1] = { 0x2d8, BIT(1) }, + [RST_BUS_I2C2] = { 0x2d8, BIT(2) }, + [RST_BUS_UART0] = { 0x2d8, BIT(16) }, + [RST_BUS_UART1] = { 0x2d8, BIT(17) }, + [RST_BUS_UART2] = { 0x2d8, BIT(18) }, + [RST_BUS_UART3] = { 0x2d8, BIT(19) }, + [RST_BUS_UART4] = { 0x2d8, BIT(20) }, }; static const struct sunxi_ccu_desc sun8i_a33_ccu_desc = {