From patchwork Tue Jan 17 14:02:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mylene JOSSERAND X-Patchwork-Id: 9521121 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EFA9B60244 for ; Tue, 17 Jan 2017 14:08:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D947C28562 for ; Tue, 17 Jan 2017 14:08:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CD4002856B; Tue, 17 Jan 2017 14:08:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 73C1128562 for ; Tue, 17 Jan 2017 14:08:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751037AbdAQOEr (ORCPT ); Tue, 17 Jan 2017 09:04:47 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:54252 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751026AbdAQOEo (ORCPT ); Tue, 17 Jan 2017 09:04:44 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id 0E1FF20BA7; Tue, 17 Jan 2017 15:04:46 +0100 (CET) Received: from dell-desktop.home (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 9A5CC20B73; Tue, 17 Jan 2017 15:04:45 +0100 (CET) From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?= To: lgirdwood@gmail.com, broonie@kernel.org, perex@perex.cz, tiwai@suse.com, maxime.ripard@free-electrons.com, wens@csie.org, mturquette@baylibre.com, sboyd@codeaurora.org, mark.rutland@arm.com, robh+dt@kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com, mylene.josserand@free-electrons.com, alexandre.belloni@free-electrons.com Subject: [PATCH v2 02/10] clk: ccu-sun8i-a33: Add CLK_SET_RATE_PARENT to ac-dig Date: Tue, 17 Jan 2017 15:02:22 +0100 Message-Id: <20170117140230.23142-3-mylene.josserand@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170117140230.23142-1-mylene.josserand@free-electrons.com> References: <20170117140230.23142-1-mylene.josserand@free-electrons.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The audio DAI needs to set the clock rates of the ac-dig clock. To make it possible, the parent PLL audio clock rates should also be changed. This is possible via "CLK_SET_RATE_PARENT" flag. Signed-off-by: Mylène Josserand --- drivers/clk/sunxi-ng/ccu-sun8i-a33.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c index 9bd1f78a0547..3cd4190ccd59 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c @@ -440,7 +440,7 @@ static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve", "pll-ve", 0x13c, 16, 3, BIT(31), CLK_SET_RATE_PARENT); static SUNXI_CCU_GATE(ac_dig_clk, "ac-dig", "pll-audio", - 0x140, BIT(31), 0); + 0x140, BIT(31), CLK_SET_RATE_PARENT); static SUNXI_CCU_GATE(ac_dig_4x_clk, "ac-dig-4x", "pll-audio-4x", 0x140, BIT(30), 0); static SUNXI_CCU_GATE(avs_clk, "avs", "osc24M",