From patchwork Fri Jan 27 18:20:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Brandt X-Patchwork-Id: 9542489 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1D491604A0 for ; Fri, 27 Jan 2017 18:25:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1037326E91 for ; Fri, 27 Jan 2017 18:25:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0506827F93; Fri, 27 Jan 2017 18:25:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AD0D227F85 for ; Fri, 27 Jan 2017 18:25:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750818AbdA0SWq (ORCPT ); Fri, 27 Jan 2017 13:22:46 -0500 Received: from relmlor4.renesas.com ([210.160.252.174]:12232 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750825AbdA0SWS (ORCPT ); Fri, 27 Jan 2017 13:22:18 -0500 Received: from unknown (HELO relmlir3.idc.renesas.com) ([10.200.68.153]) by relmlie3.idc.renesas.com with ESMTP; 28 Jan 2017 03:21:13 +0900 Received: from relmlac3.idc.renesas.com (relmlac3.idc.renesas.com [10.200.69.23]) by relmlir3.idc.renesas.com (Postfix) with ESMTP id 83CAD42FF4; Sat, 28 Jan 2017 03:21:13 +0900 (JST) Received: by relmlac3.idc.renesas.com (Postfix, from userid 0) id 7DBBD18070; Sat, 28 Jan 2017 03:21:13 +0900 (JST) Received: from relmlac3.idc.renesas.com (localhost [127.0.0.1]) by relmlac3.idc.renesas.com (Postfix) with ESMTP id 767F51806F; Sat, 28 Jan 2017 03:21:13 +0900 (JST) Received: from relmlii2.idc.renesas.com [10.200.68.66] by relmlac3.idc.renesas.com with ESMTP id DAY30819; Sat, 28 Jan 2017 03:21:13 +0900 X-IronPort-AV: E=Sophos;i="5.33,296,1477926000"; d="scan'208";a="232794099" Received: from unknown (HELO rtamta01.rta.renesas.com) ([143.103.48.75]) by relmlii2.idc.renesas.com with ESMTP; 28 Jan 2017 03:21:12 +0900 Received: from localhost.localdomain (unknown [172.27.49.212]) by rtamta01.rta.renesas.com (Postfix) with ESMTP id 450D63B9; Fri, 27 Jan 2017 18:21:07 +0000 (UTC) From: Chris Brandt To: Geert Uytterhoeven , Michael Turquette , Stephen Boyd , Kuninori Morimoto Cc: Simon Horman , Jacopo Mondi , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Chris Brandt Subject: [PATCH] clk: renesas: mstp: disable runtime pm for r7s72100 Date: Fri, 27 Jan 2017 13:20:40 -0500 Message-Id: <20170127182040.22240-1-chris.brandt@renesas.com> X-Mailer: git-send-email 2.10.1 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Due to the lack of clock status bits, we need to disable runtime pm for all RZ/A1 peripherals. Otherwise, it is possible that a driver will start using a peripheral before it is fully ready. By using pm_clk_resume immediately after we add the clock we ensure the usage counter will never get back down to 0, and hence will always keep the clock enabled. In order for dis_runtime_pm to be accessible for all relevant functions in this file, it needed to be a global. Signed-off-by: Chris Brandt --- drivers/clk/renesas/clk-mstp.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/clk/renesas/clk-mstp.c b/drivers/clk/renesas/clk-mstp.c index 69cfdb9..3c91555 100644 --- a/drivers/clk/renesas/clk-mstp.c +++ b/drivers/clk/renesas/clk-mstp.c @@ -59,6 +59,8 @@ struct mstp_clock { struct mstp_clock_group *group; }; +static bool dis_runtime_pm; + #define to_mstp_clock(_hw) container_of(_hw, struct mstp_clock, hw) static inline u32 cpg_mstp_read(struct mstp_clock_group *group, @@ -216,6 +218,13 @@ static void __init cpg_mstp_clocks_init(struct device_node *np) if (of_device_is_compatible(np, "renesas,r7s72100-mstp-clocks")) group->width_8bit = true; + /* + * Due to the lack of clock status bits, we need to disable runtime pm + * for all RZ/A1 peripherals. + */ + if (of_device_is_compatible(np, "renesas,r7s72100-mstp-clocks")) + dis_runtime_pm = true; + for (i = 0; i < MSTP_MAX_CLOCKS; ++i) clks[i] = ERR_PTR(-ENOENT); @@ -314,6 +323,9 @@ int cpg_mstp_attach_dev(struct generic_pm_domain *unused, struct device *dev) goto fail_destroy; } + if (dis_runtime_pm) + pm_clk_resume(dev); + return 0; fail_destroy: @@ -325,8 +337,11 @@ int cpg_mstp_attach_dev(struct generic_pm_domain *unused, struct device *dev) void cpg_mstp_detach_dev(struct generic_pm_domain *unused, struct device *dev) { - if (!list_empty(&dev->power.subsys_data->clock_list)) + if (!list_empty(&dev->power.subsys_data->clock_list)) { + if (dis_runtime_pm) + pm_clk_suspend(dev); pm_clk_destroy(dev); + } } void __init cpg_mstp_add_clk_domain(struct device_node *np) @@ -344,7 +359,8 @@ void __init cpg_mstp_add_clk_domain(struct device_node *np) return; pd->name = np->name; - pd->flags = GENPD_FLAG_PM_CLK; + if (!dis_runtime_pm) + pd->flags = GENPD_FLAG_PM_CLK; pd->attach_dev = cpg_mstp_attach_dev; pd->detach_dev = cpg_mstp_detach_dev; pm_genpd_init(pd, &pm_domain_always_on_gov, false);