From patchwork Mon May 15 05:54:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 9726117 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E701760380 for ; Mon, 15 May 2017 05:55:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D6CA22894E for ; Mon, 15 May 2017 05:55:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CB9AB28958; Mon, 15 May 2017 05:55:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 803722894E for ; Mon, 15 May 2017 05:55:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759035AbdEOFy7 (ORCPT ); Mon, 15 May 2017 01:54:59 -0400 Received: from mail-pf0-f176.google.com ([209.85.192.176]:35913 "EHLO mail-pf0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758969AbdEOFy6 (ORCPT ); Mon, 15 May 2017 01:54:58 -0400 Received: by mail-pf0-f176.google.com with SMTP id m17so57321057pfg.3 for ; Sun, 14 May 2017 22:54:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=eF1NCHRdgYeSwUw/BUsdYReuItV1TCgRBZS89MNcBOk=; b=ia+cc9lpENR8QEGwE9JaquEvmIQbE3FB4OvZ41EvcpHA9kJTbvryRk3UeiiCvHdA/h qqtorc9DTifPiIDGWgk+f6BOr40xcw7rs7tTVaG1P6lyn+UKJ019yPOkFRIVl84VVptX gv3puW/h5dHySbezEQX3862ydH62aK1NaxihQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=eF1NCHRdgYeSwUw/BUsdYReuItV1TCgRBZS89MNcBOk=; b=gKvNmFfMYoygDKrE6b2z4t4Hh0ZGKweb3usnV0+WliIGbLC4weN3hdocqaD6tvge7d qToL2iT0ZlxHmDX3GtwOkEFhvBoYYGj5Mfee4lNq++e26uvIFbcjmIvA4r2csH7ivnk0 HJwHzZDOcXeAFJdAbj7vdcI7Di7KtffcfzMvP6vSHCFia2CWnGxgMeQdoa6j8Ffo2XFF To9/+6W3b7lzbGSOgercEH+lGPEXr/ZR0l8yHFhS6ySdJaa3ciCnYFYI7CrO+tKH4/Jz n2M2sfXzlHtRxUMbgv6E5RO+3rpDfRlzymrlEKZXoHnIGtzJz2x7XgzermHndozHvm6L nFzg== X-Gm-Message-State: AODbwcByPtxYNZI4KBXVYVU8I7trh9nFBsOZLGf84qmB6BXHWl3aDVwg jm146Vq8V7Uf7CLj X-Received: by 10.98.212.66 with SMTP id u2mr4412888pfl.73.1494827697634; Sun, 14 May 2017 22:54:57 -0700 (PDT) Received: from localhost.localdomain ([45.56.159.87]) by smtp.gmail.com with ESMTPSA id t5sm17315105pgo.48.2017.05.14.22.54.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 14 May 2017 22:54:56 -0700 (PDT) From: Guodong Xu To: mturquette@baylibre.com, sboyd@codeaurora.org, robh+dt@kernel.org, mark.rutland@arm.com, guodong.xu@linaro.org, chenjun14@huawei.com, zhongkaihua@huawei.com, zhangfei.gao@linaro.org, leo.yan@linaro.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, John Stultz Subject: [PATCH 1/3] clk: hi3660: fix wrong parent name of clk_mux_sysbus Date: Mon, 15 May 2017 13:54:21 +0800 Message-Id: <20170515055423.1803-1-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Chen Jun Parent name of clk_mux_sysbus is not correct. This patch fixes it. Signed-off-by: Chen Jun Signed-off-by: John Stultz Signed-off-by: Guodong Xu --- drivers/clk/hisilicon/clk-hi3660.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/clk/hisilicon/clk-hi3660.c b/drivers/clk/hisilicon/clk-hi3660.c index 96a9697..143ce0c 100644 --- a/drivers/clk/hisilicon/clk-hi3660.c +++ b/drivers/clk/hisilicon/clk-hi3660.c @@ -206,6 +206,8 @@ static const struct hisi_gate_clock hi3660_crgctrl_gate_clks[] = { }; static const char *const +clk_mux_sysbus_p[] = {"clk_ppll1", "clk_ppll0"}; +static const char *const clk_mux_sdio_sys_p[] = {"clk_factor_mmc", "clk_div_sdio",}; static const char *const clk_mux_sd_sys_p[] = {"clk_factor_mmc", "clk_div_sd",}; @@ -239,8 +241,8 @@ static const char *const clk_mux_i2c_p[] = {"clkin_sys", "clk_div_i2c",}; static const struct hisi_mux_clock hi3660_crgctrl_mux_clks[] = { - { HI3660_CLK_MUX_SYSBUS, "clk_mux_sysbus", clk_mux_sdio_sys_p, - ARRAY_SIZE(clk_mux_sdio_sys_p), CLK_SET_RATE_PARENT, 0xac, 0, 1, + { HI3660_CLK_MUX_SYSBUS, "clk_mux_sysbus", clk_mux_sysbus_p, + ARRAY_SIZE(clk_mux_sysbus_p), CLK_SET_RATE_PARENT, 0xac, 0, 1, CLK_MUX_HIWORD_MASK, }, { HI3660_CLK_MUX_UART0, "clk_mux_uart0", clk_mux_uart0_p, ARRAY_SIZE(clk_mux_uart0_p), CLK_SET_RATE_PARENT, 0xac, 2, 1,